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/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/
Dassembler_aarch64.h156 class Operand {
158 Operand(Immediate imm) in Operand() function
163 Operand(Register reg, Shift shift = Shift::LSL, uint8_t shift_amount = 0)
167 Operand(Register reg, Extend extend, uint8_t shiftAmount = 0)
171 ~Operand() = default;
299 void Ldp(const Register &rt, const Register &rt2, const MemoryOperand &operand);
300 void Stp(const Register &rt, const Register &rt2, const MemoryOperand &operand);
301 void Ldp(const VectorRegister &vt, const VectorRegister &vt2, const MemoryOperand &operand);
302 void Stp(const VectorRegister &vt, const VectorRegister &vt2, const MemoryOperand &operand);
303 void Ldr(const Register &rt, const MemoryOperand &operand);
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Dassembler_aarch64.cpp89 void AssemblerAarch64::Ldp(const Register &rt, const Register &rt2, const MemoryOperand &operand) in Ldp() argument
92 if (operand.IsImmediateOffset()) { in Ldp()
93 switch (operand.GetAddrMode()) { in Ldp()
107 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); in Ldp()
114 Rn(operand.GetRegBase().GetId()) | Rt(rt.GetId()); in Ldp()
121 void AssemblerAarch64::Stp(const Register &rt, const Register &rt2, const MemoryOperand &operand) in Stp() argument
124 if (operand.IsImmediateOffset()) { in Stp()
125 switch (operand.GetAddrMode()) { in Stp()
139 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); in Stp()
146 Rn(operand.GetRegBase().GetId()) | Rt(rt.GetId()); in Stp()
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/arkcompiler/ets_runtime/ecmascript/compiler/trampoline/x64/
Doptimized_call.cpp71 __ Leaq(Operand(rsp, 2 * FRAME_SLOT_SIZE), rbp); in JSFunctionEntry()
74 __ Movq(Operand(rbx, 0), rdx); in JSFunctionEntry()
75 __ Movq(Operand(rbx, FRAME_SLOT_SIZE), rcx); in JSFunctionEntry()
76 __ Movq(Operand(rbx, DOUBLE_SLOT_SIZE), r8); in JSFunctionEntry()
95 __ Movq(prevFpReg, Operand(glueReg, JSThread::GlueData::GetLeaveFrameOffset(false))); in JSFunctionEntry()
145 __ Leaq(Operand(rsp, 2 * FRAME_SLOT_SIZE), rbp); in OptimizedCallOptimized()
177 __ Movq(Operand(argvReg, rax, Scale::Times8, -FRAME_SLOT_SIZE), rbx); // -8: stack index in OptimizedCallOptimized()
186 __ Leaq(Operand(r14, Scale::Times8, 0), codeAddrReg); in OptimizedCallOptimized()
248 __ Movq(glueReg, Operand(rsp, FRAME_SLOT_SIZE)); // thread (instead of env) in CallBuiltinTrampoline()
251 __ Leaq(Operand(rbp, 2 * FRAME_SLOT_SIZE), rdi); // 16: skip argc & env in CallBuiltinTrampoline()
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Dasm_interpreter_call.cpp93 __ Movq(Operand(rsi, GeneratorContext::GENERATOR_METHOD_OFFSET), callTargetRegister); in GeneratorReEnterAsmInterpDispatch()
94 __ Movq(Operand(callTargetRegister, JSFunctionBase::METHOD_OFFSET), methodRegister); in GeneratorReEnterAsmInterpDispatch()
104 __ Movl(Operand(rsi, GeneratorContext::GENERATOR_NREGS_OFFSET), nRegsRegister); in GeneratorReEnterAsmInterpDispatch()
105 __ Movq(Operand(rsi, GeneratorContext::GENERATOR_THIS_OFFSET), thisRegister); in GeneratorReEnterAsmInterpDispatch()
106 __ Movq(Operand(rsi, GeneratorContext::GENERATOR_REGS_ARRAY_OFFSET), regsArrayRegister); in GeneratorReEnterAsmInterpDispatch()
146 __ Movq(Operand(callTargetRegister, TaggedObject::HCLASS_OFFSET), tempRegister); // hclass in AsmInterpEntryDispatch()
147 __ Movq(Operand(tempRegister, JSHClass::BIT_FIELD_OFFSET), bitFieldRegister); in AsmInterpEntryDispatch()
166 __ Leaq(Operand(argvRegister, NUM_MANDATORY_JSFUNC_ARGS * JSTaggedValue::TaggedTypeSize()), in AsmInterpEntryDispatch()
180 …__ Movq(Operand(rax, trampolineIdRegister, Times8, JSThread::GlueData::GetRTStubEntriesOffset(fals… in AsmInterpEntryDispatch()
194 __ Movq(Operand(methodRegister, Method::NATIVE_POINTER_OR_BYTECODE_ARRAY_OFFSET), pcRegister); in PushFrameState()
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Dcommon_call.cpp38 __ Movq(Operand(argV, argc, Scale::Times8, -FRAME_SLOT_SIZE), arg); // -8: stack index in CopyArgumentWithArgV()
50 __ Leaq(Operand(rsp, 24), rbp); // 24: skip pc, prevSp and frame type in PushAsmInterpBridgeFrame()
61 __ Movq(Operand(rbp, FRAME_SLOT_SIZE), r13); in GetArgvAtStack()
62 __ Movq(Operand(rbp, 2 * FRAME_SLOT_SIZE), r14); // 2: skip second argv in GetArgvAtStack()
99 __ Movq(Operand(argv, opArgc, Times8, -8), op); // 8: 8 bytes argv crash rdx=0x8 in PushArgsWithArgvAndCheckStack()
115 __ Movq(Operand(glue, JSThread::GlueData::GetStackLimitOffset(false)), temp1); in StackOverflowCheck()
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/x64/
Dassembler_x64.h61 class Operand {
63 Operand(Register base, int32_t disp);
64 Operand(Register base, Register index, Scale scale, int32_t disp);
65 Operand(Register index, Scale scale, int32_t disp);
66 ~Operand() = default;
95 void Movq(const Operand &src, Register dst);
96 void Movq(Register src, const Operand &dst);
97 void Movq(Immediate src, Operand dst);
99 void Mov(const Operand &src, Register dst);
142 void Leaq(const Operand &src, Register dst);
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Dassembler_x64.cpp264 void AssemblerX64::Movq(const Operand &src, Register dst) in Movq()
272 void AssemblerX64::Movq(Register src, const Operand &dst) in Movq()
280 void AssemblerX64::Movq(Immediate src, Operand dst) in Movq()
298 void AssemblerX64::Mov(const Operand &src, Register dst) in Mov()
767 Operand::Operand(Register base, int32_t disp) in Operand() function in panda::ecmascript::x64::Operand
786 Operand::Operand(Register base, Register index, Scale scale, int32_t disp) in Operand() function in panda::ecmascript::x64::Operand
804 Operand::Operand(Register index, Scale scale, int32_t disp) in Operand() function in panda::ecmascript::x64::Operand
812 void Operand::BuildSIB(Scale scale, Register index, Register base) in BuildSIB()
819 void Operand::BuildModerm(int32_t mode, Register rm) in BuildModerm()
825 void Operand::BuildDisp8(int32_t disp) in BuildDisp8()
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/arkcompiler/runtime_core/isa/
Disapi.rb32 res << Operand.new('acc', 'out', dst_type)
33 res << Operand.new('acc', 'in', src_type)
37 res << Operand.new('acc', 'out', type)
38 res << Operand.new('acc', 'in', type)
40 res << Operand.new('acc', srcdst, type)
61 raise "Unexpected operand signature: #{sig}"
161 operands.map do |operand|
162 name, srcdst, type = Util.parse_operand_signature(operand)
169 operands.map do |operand|
170 name, srcdst, type = Util.parse_operand_signature(operand)
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Dasserts.rb107 assert('Mnemonic defines operand types') do
121 assert('Instruction::float? should play well with operand types') do
157 assert('Operand type should be one of none, ref, u1, u2, i8, u8, i16, u16, i32, u32, b32, i64, u64,…
171 assert('Instruction should have not more than one ID operand') do
/arkcompiler/ets_frontend/ts2panda/src/
Dts2panda.ts106 let operand = operands[i];
107 if (operand instanceof VReg) {
108 insRegs.push((<VReg>operand).num);
112 if (operand instanceof Imm) {
113 insImms.push((<Imm>operand).value);
117 if (typeof (operand) === "string") {
118 insIds.push(operand);
122 if (operand instanceof Label) {
123 let labelName = Ts2Panda.labelPrefix + operand.id;
129 insn.operands.forEach((operand: OperandType) => {
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/arkcompiler/runtime_core/compiler/optimizer/templates/
Dinst_checker_gen.h.erb51 …ASSERT_DO(CheckType(inst->GetType(), <%= inst.dst.types.map { |x| Operand::cpp_type(x) }.join(', '…
59 % inst.inputs.each_with_index do |operand, i|
60 % if operand.has('save_state')
63 …ASSERT_DO(CheckType(GetInputType(inst, <%= i %>), <%= operand.types.map { |x| Operand::cpp_type(x)…
Dinstructions.rb60 class Operand class
140 @operands = signature.map { |sgn| Operand.new(sgn) }
146 raise "Destination can be only first operand" if inputs.any? { |x| x.is_dst? }
/arkcompiler/runtime_core/compiler/optimizer/ir/
Dinstructions.yaml20 For info about operand tokens see the 'legend' section
22 …Note: any check instructions might be eliminated by optimizer, thus operand checks (nc, zc, bc, ng…
778 description: Bitwise OR of first operand and result of bitwise NOT of seconds operand.
785 description: Bitwise AND of first operand and result of bitwise NOT of seconds operand.
792 description: Bitwise XOR of first operand and result of bitwise NOT of seconds operand.
799 description: Bitwise AND between first operand and shifted value of second operand.
806 description: Bitwise OR between first operand and shifted value of second operand.
813 description: Bitwise XOR between first operand and shifted value of second operand.
820 description: Bitwise AND between first operand and NOT of shifted value of second operand.
827 description: Bitwise OR between first operand and NOT of shifted value of second operand.
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/arkcompiler/runtime_core/disassembler/templates/
Dbc_ins_to_pandasm_ins.cpp.erb35 % i.operands.each do |operand|
36 % if (operand.name == :imm)
37 % if (operand.type != "i64")
44 % elsif (operand.name == :v)
/arkcompiler/runtime_core/runtime/mem/gc/
Dgc_barrier_set.h89 … * Get barrier operand (literal, function pointer, address etc. See enum BarrierType for details.
91 * @param name - string with name of operand
92 * @return barrier operand (value is address or literal)
100 * Add barrier operand if there are no operands with this name
101 * @param barrier_position - pre or post position of barrier with added operand
102 * @param name - name of operand
103 * @param barrier_operand - operand
/arkcompiler/ets_frontend/es2panda/ir/expressions/
DunaryExpression.cpp67 compiler::Operand prop = argument_->AsMemberExpression()->CompileKey(pg); in Compile()
71 // compile the delete operand. in Compile()
132 … checker->ThrowTypeError("The operand of a delete operator must be a property reference.", in Check()
139 … checker->ThrowTypeError("The operand of a delete operator cannot be a private identifier.", in Check()
146 … checker->ThrowTypeError("The operand of a delete operator cannot be a readonly property.", in Check()
151 …checker->ThrowTypeError("The operand of a delete operator must be a optional.", argument_->Start()… in Check()
DupdateExpression.cpp62 …checker->ThrowTypeError("An arithmetic operand must be of type 'any', 'number', 'bigint' or an enu… in Check()
67 …argument_, "The operand of an increment or decrement operator must be a variable or a property acc… in Check()
68 "The operand of an increment or decrement operator may not be an optional property access"); in Check()
/arkcompiler/ets_frontend/ts2panda/tests/statements/
Dfor.test.ts111 let operand = new VReg(); variable
132 new Sta(operand),
133 new Lda(operand),
153 let operand = new VReg(); variable
174 new Sta(operand),
175 new Lda(operand),
/arkcompiler/ets_frontend/es2panda/compiler/core/
Dpandagen.h272 void LoadObjProperty(const ir::AstNode *node, VReg obj, const Operand &prop);
276 void StoreObjProperty(const ir::AstNode *node, VReg obj, const Operand &prop);
277 …void StoreOwnProperty(const ir::AstNode *node, VReg obj, const Operand &prop, bool nameSetting = f…
278 void DeleteObjProperty(const ir::AstNode *node, VReg obj, const Operand &prop);
312 void Unary(const ir::AstNode *node, lexer::TokenType op, VReg operand);
418 void StoreSuperProperty(const ir::AstNode *node, VReg obj, const Operand &prop);
419 void LoadSuperProperty(const ir::AstNode *node, VReg obj, const Operand &prop);
451 static Operand ToNamedPropertyKey(const ir::Expression *prop, bool isComputed);
452 Operand ToPropertyKey(const ir::Expression *prop, bool isComputed);
/arkcompiler/runtime_core/libpandafile/
Dpandafile_isapi.rb41 Operand.class_eval do
59 # tag - the same as in Operand isapi class
/arkcompiler/runtime_core/compiler/optimizer/code_generator/target/aarch32/
Dtarget.h164 static inline vixl::aarch32::Operand VixlImm(const int32_t IMM) in VixlImm()
166 return vixl::aarch32::Operand(IMM); in VixlImm()
219 static inline vixl::aarch32::Operand VixlImm(Imm imm) in VixlImm()
225 return vixl::aarch32::Operand(data); in VixlImm()
228 return vixl::aarch32::Operand(imm.GetValue<int32_t>()); in VixlImm()
231 return vixl::aarch32::Operand(imm.GetValue<int16_t>()); in VixlImm()
234 return vixl::aarch32::Operand(imm.GetValue<int8_t>()); in VixlImm()
238 return vixl::aarch32::Operand(data); in VixlImm()
242 return vixl::aarch32::Operand(data); in VixlImm()
246 return vixl::aarch32::Operand(imm.GetValue<int8_t>()); in VixlImm()
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/arkcompiler/ets_runtime/ecmascript/compiler/trampoline/aarch64/
Dcommon_call.cpp109 __ Add(argv, argv, Operand(argc.W(), UXTW, 3)); // 3: argc * 8 in PushArgsWithArgv()
139 __ Sub(op, currentSlot, Operand(op, UXTX, 0)); in StackOverflowCheck()
140 __ Cmp(op, Operand(numArgs, LSL, 3)); // 3: each args occupies 8 bytes in StackOverflowCheck()
/arkcompiler/runtime_core/compiler/optimizer/code_generator/target/aarch64/
Dtarget.h181 static inline vixl::aarch64::Operand VixlShift(Shift shift) in VixlShift()
194 return vixl::aarch64::Operand(vixl_reg, Convert(shift.GetType()), shift.GetScale()); in VixlShift()
201 static inline vixl::aarch64::Operand VixlImm(const int64_t IMM) in VixlImm()
203 return vixl::aarch64::Operand(IMM); in VixlImm()
206 static inline vixl::aarch64::Operand VixlImm(Imm imm) in VixlImm()
210 return vixl::aarch64::Operand(imm.GetValue<int64_t>()); in VixlImm()
213 return vixl::aarch64::Operand(imm.GetValue<int32_t>()); in VixlImm()
216 return vixl::aarch64::Operand(imm.GetValue<int16_t>()); in VixlImm()
219 return vixl::aarch64::Operand(imm.GetValue<int8_t>()); in VixlImm()
223 return vixl::aarch64::Operand(imm.GetValue<int8_t>()); in VixlImm()
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/arkcompiler/runtime_core/libpandafile/templates/
Dbytecode_instruction-inl_gen.h.erb91 static_assert(HasId(format, idx), "Instruction doesn't have id operand with such index");
121 ASSERT_PRINT(HasId(format, idx), "Instruction doesn't have imm operand with such index");
152 ASSERT_PRINT(HasId(format, idx), "Instruction doesn't have id operand with such index");
186 static_assert(HasVReg(format, idx), "Instruction doesn't have vreg operand with such index");
213 ASSERT_PRINT(HasVReg(format, idx), "Instruction doesn't have vreg operand with such index");
249 static_assert(HasImm(format, idx), "Instruction doesn't have imm operand with such index");
275 ASSERT_PRINT(HasImm(format, idx), "Instruction doesn't have imm operand with such index");
/arkcompiler/ets_frontend/ts2panda/src/expression/
DmemberAccessExpression.ts77 …UnaryExpression(node.argumentExpression) && ts.isNumericLiteral(node.argumentExpression.operand) &&
80 let temp = parseFloat(jshelpers.getTextOfIdentifierOrLiteral(expr.operand));

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