| /kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
| D | phy-qcom-qmp.h | 10 #define QSERDES_COM_BG_TIMER 0x00c
11 #define QSERDES_COM_SSC_EN_CENTER 0x010
12 #define QSERDES_COM_SSC_ADJ_PER1 0x014
13 #define QSERDES_COM_SSC_ADJ_PER2 0x018
14 #define QSERDES_COM_SSC_PER1 0x01c
15 #define QSERDES_COM_SSC_PER2 0x020
16 #define QSERDES_COM_SSC_STEP_SIZE1 0x024
17 #define QSERDES_COM_SSC_STEP_SIZE2 0x028
18 #define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x034
19 #define QSERDES_COM_CLK_ENABLE1 0x038
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/vc4/ |
| D | vc4_hdmi_regs.h | 6 #define VC4_HDMI_PACKET_STRIDE 0x24
9 VC4_INVALID = 0,
147 VC4_HD_REG(HDMI_M_CTL, 0x000c),
148 VC4_HD_REG(HDMI_MAI_CTL, 0x0014),
149 VC4_HD_REG(HDMI_MAI_THR, 0x0018),
150 VC4_HD_REG(HDMI_MAI_FMT, 0x001c),
151 VC4_HD_REG(HDMI_MAI_DATA, 0x0020),
152 VC4_HD_REG(HDMI_MAI_SMP, 0x002c),
153 VC4_HD_REG(HDMI_VID_CTL, 0x0038),
154 VC4_HD_REG(HDMI_CSC_CTL, 0x0040),
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/via/ |
| D | accel.h | 14 #define MMIO_VGABASE 0x8000
15 #define MMIO_CR_READ (MMIO_VGABASE + 0x3D4)
16 #define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5)
17 #define MMIO_SR_READ (MMIO_VGABASE + 0x3C4)
18 #define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5)
21 #define HW_Cursor_ON 0
27 #define VIA_MMIO_BLTBASE 0x200000
28 #define VIA_MMIO_BLTSIZE 0x200000
31 #define VIA_REG_GECMD 0x000
32 #define VIA_REG_GEMODE 0x004
[all …]
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-driver-jz4780-efuse | 10 0x000 64 bit Random Number
11 0x008 128 bit Ingenic Chip ID
12 0x018 128 bit Customer ID
13 0x028 3520 bit Reserved
14 0x1E0 8 bit Protect Segment
15 0x1E1 2296 bit HDMI Key
16 0x300 2048 bit Security boot key
|
| /kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/ |
| D | virtio_mmio.h | 8 #define VIRTIO_MMIO_MAGIC_VALUE 0x000
9 #define VIRTIO_MMIO_VERSION 0x004
10 #define VIRTIO_MMIO_DEVICE_ID 0x008
11 #define VIRTIO_MMIO_VENDOR_ID 0x00c
12 #define VIRTIO_MMIO_DEVICE_FEATURES 0x010
13 #define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014
14 #define VIRTIO_MMIO_DRIVER_FEATURES 0x020
15 #define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024
17 #define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
19 #define VIRTIO_MMIO_QUEUE_SEL 0x030
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | serial_pnx8xxx.h | 20 #define PNX8XXX_LCR 0
21 #define PNX8XXX_MCR 0x004
22 #define PNX8XXX_BAUD 0x008
23 #define PNX8XXX_CFG 0x00c
24 #define PNX8XXX_FIFO 0x028
25 #define PNX8XXX_ISTAT 0xfe0
26 #define PNX8XXX_IEN 0xfe4
27 #define PNX8XXX_ICLR 0xfe8
28 #define PNX8XXX_ISET 0xfec
29 #define PNX8XXX_PD 0xff4
[all …]
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| /kernel/linux/linux-5.10/include/linux/amba/ |
| D | sp810.h | 18 #define SCCTRL 0x000
19 #define SCSYSSTAT 0x004
20 #define SCIMCTRL 0x008
21 #define SCIMSTAT 0x00C
22 #define SCXTALCTRL 0x010
23 #define SCPLLCTRL 0x014
24 #define SCPLLFCTRL 0x018
25 #define SCPERCTRL0 0x01C
26 #define SCPERCTRL1 0x020
27 #define SCPEREN 0x024
[all …]
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| /kernel/linux/linux-5.10/sound/soc/meson/ |
| D | aiu.h | 18 PCLK = 0,
63 #define AIU_IEC958_BPF 0x000
64 #define AIU_958_MISC 0x010
65 #define AIU_IEC958_DCU_FF_CTRL 0x01c
66 #define AIU_958_CHSTAT_L0 0x020
67 #define AIU_958_CHSTAT_L1 0x024
68 #define AIU_958_CTRL 0x028
69 #define AIU_I2S_SOURCE_DESC 0x034
70 #define AIU_I2S_DAC_CFG 0x040
71 #define AIU_I2S_SYNC 0x044
[all …]
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | omap_l3_smx.h | 14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/ |
| D | hikey970-pinctrl.dtsi | 16 reg = <0x0 0xe896c000 0x0 0x72c>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
22 pinctrl-single,gpio-range = <&range 0 82 0>;
26 0x054 MUX_M2 /* UART0_RXD */
27 0x058 MUX_M2 /* UART0_TXD */
33 0x700 MUX_M2 /* UART2_CTS_N */
34 0x704 MUX_M2 /* UART2_RTS_N */
35 0x708 MUX_M2 /* UART2_RXD */
[all …]
|
| D | poplar-pinctrl.dtsi | 21 0x000 MUX_M2
22 0x004 MUX_M2
23 0x008 MUX_M2
24 0x00c MUX_M2
25 0x010 MUX_M2
26 0x014 MUX_M2
27 0x018 MUX_M2
28 0x01c MUX_M2
29 0x024 MUX_M2
32 PINCTRL_PULLDOWN(0, 1, 0, 1)
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/rkvdec/ |
| D | rkvdec-regs.h | 7 #define RKVDEC_REG_INTERRUPT 0x004
8 #define RKVDEC_INTERRUPT_DEC_E BIT(0)
32 #define RKVDEC_REG_SYSCTRL 0x008
33 #define RKVDEC_IN_ENDIAN BIT(0)
44 #define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12)
45 #define RKVDEC_MODE(x) (((x) & 0x03) << 20)
55 #define RKVDEC_REG_PICPAR 0x00C
56 #define RKVDEC_Y_HOR_VIRSTRIDE(x) ((x) & 0x1ff)
58 #define RKVDEC_UV_HOR_VIRSTRIDE(x) (((x) & 0x1ff) << 12)
59 #define RKVDEC_SLICE_NUM_LOWBITS(x) (((x) & 0x7ff) << 21)
[all …]
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| /kernel/linux/linux-5.10/arch/m68k/ifpsp060/ |
| D | isp.doc | 112 bra _060ISP_TOP+128+0
116 point is located 0 bytes from the top of the "Entry-point" section.)
123 0x000: _060_real_chk
124 0x004: _060_real_divbyzero
125 0x008: _060_real_trace
126 0x00c: _060_real_access
127 0x010: _060_isp_done
129 0x014: _060_real_cas
130 0x018: _060_real_cas2
131 0x01c: _060_real_lock_page
[all …]
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| /kernel/linux/linux-5.10/drivers/phy/tegra/ |
| D | xusb-tegra210.c | 25 ((x) ? (11 + ((x) - 1) * 6) : 0)
26 #define FUSE_SKU_CALIB_HS_CURR_LEVEL_PAD_MASK 0x3f
28 #define FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_MASK 0xf
30 #define FUSE_USB_CALIB_EXT_RPD_CTRL_SHIFT 0
31 #define FUSE_USB_CALIB_EXT_RPD_CTRL_MASK 0x1f
33 #define XUSB_PADCTL_USB2_PAD_MUX 0x004
35 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_MASK 0x3
36 #define XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_XUSB 0x1
38 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK 0x3
39 #define XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB 0x1
[all …]
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| /kernel/linux/linux-5.10/drivers/media/cec/platform/tegra/ |
| D | tegra_cec.h | 18 #define TEGRA_CEC_SW_CONTROL 0x000
19 #define TEGRA_CEC_HW_CONTROL 0x004
20 #define TEGRA_CEC_INPUT_FILTER 0x008
21 #define TEGRA_CEC_TX_REGISTER 0x010
22 #define TEGRA_CEC_RX_REGISTER 0x014
23 #define TEGRA_CEC_RX_TIMING_0 0x018
24 #define TEGRA_CEC_RX_TIMING_1 0x01c
25 #define TEGRA_CEC_RX_TIMING_2 0x020
26 #define TEGRA_CEC_TX_TIMING_0 0x024
27 #define TEGRA_CEC_TX_TIMING_1 0x028
[all …]
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| /kernel/linux/linux-5.10/drivers/hwtracing/coresight/ |
| D | coresight-catu.h | 14 #define CATU_CONTROL 0x000
15 #define CATU_MODE 0x004
16 #define CATU_AXICTRL 0x008
17 #define CATU_IRQEN 0x00c
18 #define CATU_SLADDRLO 0x020
19 #define CATU_SLADDRHI 0x024
20 #define CATU_INADDRLO 0x028
21 #define CATU_INADDRHI 0x02c
22 #define CATU_STATUS 0x100
23 #define CATU_DEVARCH 0xfbc
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/meson/ |
| D | axg-audio.h | 16 #define AUDIO_CLK_GATE_EN 0x000
17 #define AUDIO_MCLK_A_CTRL 0x004
18 #define AUDIO_MCLK_B_CTRL 0x008
19 #define AUDIO_MCLK_C_CTRL 0x00C
20 #define AUDIO_MCLK_D_CTRL 0x010
21 #define AUDIO_MCLK_E_CTRL 0x014
22 #define AUDIO_MCLK_F_CTRL 0x018
23 #define AUDIO_MST_PAD_CTRL0 0x01c
24 #define AUDIO_MST_PAD_CTRL1 0x020
25 #define AUDIO_SW_RESET 0x024
[all …]
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| /kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/ |
| D | virtio_mmio.h | 21 #define VIRTIO_MMIO_MAGIC_VALUE 0x000
22 #define VIRTIO_MMIO_VERSION 0x004
23 #define VIRTIO_MMIO_DEVICE_ID 0x008
24 #define VIRTIO_MMIO_VENDOR_ID 0x00c
25 #define VIRTIO_MMIO_DEVICE_FEATURES 0x010
26 #define VIRTIO_MMIO_DEVICE_FEATURES_SEL 0x014
27 #define VIRTIO_MMIO_DRIVER_FEATURES 0x020
28 #define VIRTIO_MMIO_DRIVER_FEATURES_SEL 0x024
30 #define VIRTIO_MMIO_GUEST_PAGE_SIZE 0x028
32 #define VIRTIO_MMIO_QUEUE_SEL 0x030
[all …]
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| /kernel/linux/linux-5.10/arch/mips/mm/ |
| D | c-r3k.c | 40 *p = 0xa5a55a5a; in r3k_cache_size()
44 if (dummy != 0xa5a55a5a || (status & ST0_CM)) { in r3k_cache_size()
45 size = 0; in r3k_cache_size()
47 for (size = 128; size <= 0x40000; size <<= 1) in r3k_cache_size()
48 *(p + size) = 0; in r3k_cache_size()
51 (size <= 0x40000) && (*(p + size) == 0); in r3k_cache_size()
54 if (size > 0x40000) in r3k_cache_size()
55 size = 0; in r3k_cache_size()
75 for (i = 0; i < 128; i++) in r3k_cache_lsize()
76 *(p + i) = 0; in r3k_cache_lsize()
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | hi3620-hi4511.dts | 22 reg = <0x40000000 0x20000000>;
32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
39 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
46 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
53 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
60 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
67 pinctrl-0 = <&board_pmx_pins>;
71 0x008 0x0 /* GPIO -- eFUSE_DOUT */
72 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
77 0x0f0 0x0
[all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/carl9170/ |
| D | hw.h | 43 #define AR9170_UART_REG_BASE 0x1c0000
46 #define AR9170_UART_REG_RX_BUFFER (AR9170_UART_REG_BASE + 0x000)
47 #define AR9170_UART_REG_TX_HOLDING (AR9170_UART_REG_BASE + 0x004)
48 #define AR9170_UART_REG_FIFO_CONTROL (AR9170_UART_REG_BASE + 0x010)
49 #define AR9170_UART_FIFO_CTRL_RESET_RX_FIFO 0x02
50 #define AR9170_UART_FIFO_CTRL_RESET_TX_FIFO 0x04
52 #define AR9170_UART_REG_LINE_CONTROL (AR9170_UART_REG_BASE + 0x014)
53 #define AR9170_UART_REG_MODEM_CONTROL (AR9170_UART_REG_BASE + 0x018)
54 #define AR9170_UART_MODEM_CTRL_DTR_BIT 0x01
55 #define AR9170_UART_MODEM_CTRL_RTS_BIT 0x02
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/omap3isp/ |
| D | ispreg.h | 21 #define ISP_REVISION (0x000)
22 #define ISP_SYSCONFIG (0x004)
23 #define ISP_SYSSTATUS (0x008)
24 #define ISP_IRQ0ENABLE (0x00C)
25 #define ISP_IRQ0STATUS (0x010)
26 #define ISP_IRQ1ENABLE (0x014)
27 #define ISP_IRQ1STATUS (0x018)
28 #define ISP_TCTRL_GRESET_LENGTH (0x030)
29 #define ISP_TCTRL_PSTRB_REPLAY (0x034)
30 #define ISP_CTRL (0x040)
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/ |
| D | input_formatter_global.h | 33 #define HIVE_SWITCH_M_CHANNELS 0x00000003
34 #define HIVE_SWITCH_M_FORMATTYPES 0x0000001f
35 #define HIVE_SWITCH_M_SWITCH_CODE 0x00000003
36 #define HIVE_SWITCH_M_FSYNC 0x00000007
53 /*#define HIVE_IF_RESET_ADDRESS 0x000*/ /* deprecated */
54 #define HIVE_IF_START_LINE_ADDRESS 0x004
55 #define HIVE_IF_START_COLUMN_ADDRESS 0x008
56 #define HIVE_IF_CROPPED_HEIGHT_ADDRESS 0x00C
57 #define HIVE_IF_CROPPED_WIDTH_ADDRESS 0x010
58 #define HIVE_IF_VERTICAL_DECIMATION_ADDRESS 0x014
[all …]
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-zevio.c | 18 #define IO_STATUS 0x000
19 #define IO_RAW_STATUS 0x004
20 #define IO_ENABLE 0x008
21 #define IO_DISABLE 0x00C
22 #define IO_CURRENT 0x020
23 #define IO_RESET 0x028
24 #define IO_MAX_PRIOTY 0x02C
26 #define IO_IRQ_BASE 0x000
27 #define IO_FIQ_BASE 0x100
29 #define IO_INVERT_SEL 0x200
[all …]
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| /kernel/linux/linux-5.10/arch/sparc/lib/ |
| D | U3memcpy.S | 13 #define ASI_BLK_P 0xf0
14 #define FPRS_FEF 0x04
18 #define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
21 #define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
126 add %o3, 0x80, %o3
132 add %o3, 0x40, %o3
137 add GLOBAL_SPARE, 0x10, GLOBAL_SPARE
142 add GLOBAL_SPARE, 0x08, GLOBAL_SPARE
171 cmp %g2, 0
173 /* software trap 5 "Range Check" if dst >= 0x80000000 */
[all …]
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