| /third_party/mesa3d/src/intel/compiler/ |
| D | gfx6_gs_visitor.cpp | 288 gfx6_gs_visitor::emit_snb_gs_urb_write_opcode(bool complete, int base_mrf, in emit_snb_gs_urb_write_opcode() argument
308 inst->dst = dst_reg(MRF, base_mrf); in emit_snb_gs_urb_write_opcode()
312 inst->base_mrf = base_mrf; in emit_snb_gs_urb_write_opcode()
313 inst->mlen = align_interleaved_urb_mlen(last_mrf - base_mrf); in emit_snb_gs_urb_write_opcode()
342 int base_mrf = 1; in emit_thread_end() local
367 inst->base_mrf = base_mrf; in emit_thread_end()
386 emit_urb_write_header(base_mrf); in emit_thread_end()
392 int mrf = base_mrf + 1; in emit_thread_end()
426 align_interleaved_urb_mlen(mrf - base_mrf + 1) > BRW_MAX_MSG_LENGTH) { in emit_thread_end()
433 emit_snb_gs_urb_write_opcode(complete, base_mrf, mrf, urb_offset); in emit_thread_end()
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| D | brw_vec4_generator.cpp | 40 inst->base_mrf, in generate_math1_gfx4()
96 brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1); in generate_math2_gfx4()
102 inst->base_mrf, in generate_math2_gfx4()
219 retype(brw_message_reg(inst->base_mrf), BRW_REGISTER_TYPE_UD); in generate_tex()
286 inst->base_mrf, in generate_tex()
323 if (inst->base_mrf != -1) in generate_tex()
324 gfx6_resolve_implied_move(p, &src, inst->base_mrf); in generate_tex()
349 inst->base_mrf, /* starting mrf reg nr */ in generate_vs_urb_write()
361 struct brw_reg src = brw_message_reg(inst->base_mrf); in generate_gs_urb_write()
364 inst->base_mrf, /* starting mrf reg nr */ in generate_gs_urb_write()
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| D | brw_vec4_gs_visitor.cpp | 216 int base_mrf = 1; in emit_thread_end() local
219 dst_reg mrf_reg(MRF, base_mrf); in emit_thread_end()
227 inst->base_mrf = base_mrf; in emit_thread_end()
334 int base_mrf = 1; in emit_control_data_bits() local
335 dst_reg mrf_reg(MRF, base_mrf); in emit_control_data_bits()
373 dst_reg mrf_reg2(MRF, base_mrf + 1); in emit_control_data_bits()
378 inst->base_mrf = base_mrf; in emit_control_data_bits()
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| D | brw_vec4_visitor.cpp | 56 this->base_mrf = 0; in vec4_instruction()
262 inst->base_mrf = FIRST_SPILL_MRF(devinfo->ver) + 1; in SCRATCH_READ()
276 inst->base_mrf = FIRST_SPILL_MRF(devinfo->ver); in SCRATCH_WRITE()
348 math->base_mrf = 1; in emit_math()
765 pull->base_mrf = FIRST_PULL_LOAD_MRF(devinfo->ver) + 1; in emit_pull_constant_load_reg()
797 inst->base_mrf = 2; in emit_mcs_fetch()
802 const int param_base = inst->base_mrf; in emit_mcs_fetch()
886 inst->base_mrf = 2; in emit_texture()
895 int param_base = inst->base_mrf + inst->header_size; in emit_texture()
1266 int base_mrf = 1; in emit_vertex() local
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| D | brw_schedule_instructions.cpp | 1190 if (inst->base_mrf != -1) { in calculate_deps()
1196 add_dep(last_mrf_write[inst->base_mrf + i], n); in calculate_deps()
1258 if (inst->mlen > 0 && inst->base_mrf != -1) { in calculate_deps()
1260 add_dep(last_mrf_write[inst->base_mrf + i], n); in calculate_deps()
1261 last_mrf_write[inst->base_mrf + i] = n; in calculate_deps()
1319 if (inst->base_mrf != -1) { in calculate_deps()
1325 add_dep(n, last_mrf_write[inst->base_mrf + i], 2); in calculate_deps()
1381 if (inst->mlen > 0 && inst->base_mrf != -1) { in calculate_deps()
1383 last_mrf_write[inst->base_mrf + i] = n; in calculate_deps()
1452 add_dep(last_mrf_write[inst->base_mrf + i], n); in calculate_deps()
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| D | brw_vec4_tcs.cpp | 150 inst->base_mrf = 14; in emit_thread_end()
176 inst->base_mrf = -1; in emit_input_urb_read()
208 read->base_mrf = -1; in emit_output_urb_read()
240 inst->base_mrf = -1; in emit_urb_write()
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| D | brw_ir_performance.cpp | 1357 if (is_send(inst) && inst->base_mrf != -1) { in issue_fs_inst()
1361 devinfo, brw_uvec_mrf(8, inst->base_mrf, 0), j)); in issue_fs_inst()
1415 if (is_send(inst) && inst->base_mrf != -1) { in issue_fs_inst()
1418 reg_dependency_id(devinfo, brw_uvec_mrf(8, inst->base_mrf, 0), j)); in issue_fs_inst()
1478 if (inst->base_mrf != -1) { in issue_vec4_instruction()
1482 devinfo, brw_uvec_mrf(8, inst->base_mrf, 0), j)); in issue_vec4_instruction()
1520 if (inst->base_mrf != -1) { in issue_vec4_instruction()
1523 reg_dependency_id(devinfo, brw_uvec_mrf(8, inst->base_mrf, 0), j)); in issue_vec4_instruction()
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| D | gfx6_gs_visitor.h | 65 int base_mrf,
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| D | brw_fs_generator.cpp | 408 if (inst->base_mrf >= 0) in generate_fb_write()
409 payload = brw_message_reg(inst->base_mrf); in generate_fb_write()
1068 inst->base_mrf, in generate_get_buffer_size()
1264 assert(inst->base_mrf != -1); in generate_tex()
1265 struct brw_reg header_reg = brw_message_reg(inst->base_mrf); in generate_tex()
1303 inst->base_mrf, in generate_tex()
1511 brw_MOV(p, brw_uvec_mrf(lower_size, inst->base_mrf + 1, 0), in generate_scratch_write()
1515 brw_oword_block_write_scratch(p, brw_message_reg(inst->base_mrf), in generate_scratch_write()
1529 brw_oword_block_read_scratch(p, dst, brw_message_reg(inst->base_mrf), in generate_scratch_read()
1628 brw_oword_block_read(p, dst, brw_message_reg(inst->base_mrf), in generate_uniform_pull_constant_load()
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| D | brw_fs_scoreboard.cpp | 990 if (is_send(inst) && inst->base_mrf != -1) { in update_inst_scoreboard()
994 sb.set(brw_uvec_mrf(8, inst->base_mrf + j, 0), rd_dep); in update_inst_scoreboard()
1120 if (is_send(inst) && inst->base_mrf != -1) { in gather_inst_dependencies()
1123 sb.get(brw_uvec_mrf(8, inst->base_mrf + j, 0)))); in gather_inst_dependencies()
1152 if (is_send(inst) && inst->base_mrf != -1) { in gather_inst_dependencies()
1155 sb.get(brw_uvec_mrf(8, inst->base_mrf + j, 0)))); in gather_inst_dependencies()
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| D | brw_vec4_cse.cpp | 154 a->base_mrf == b->base_mrf && in instructions_match()
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| D | brw_ir.h | 157 int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */ member
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| D | brw_fs_cse.cpp | 191 a->base_mrf == b->base_mrf && in instructions_match()
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| D | brw_fs_reg_allocate.cpp | 426 mrf_used[inst->base_mrf + i] = true; in get_used_mrfs()
795 unspill_inst->base_mrf = spill_base_mrf(bld.shader); in emit_unspill()
853 spill_inst->base_mrf = spill_base_mrf(bld.shader); in emit_spill()
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| D | brw_fs.cpp | 64 this->base_mrf = -1; in init()
970 if (base_mrf >= 0) in size_read()
1152 if (base_mrf == -1) in implied_mrf_writes()
3345 if (scan_inst->mlen > 0 && scan_inst->base_mrf != -1 && in compute_to_mrf()
3346 regions_overlap(fs_reg(MRF, scan_inst->base_mrf), scan_inst->mlen * REG_SIZE, in compute_to_mrf()
3480 int base_mrf = 0; in emit_repclear_shader() local
3481 int color_mrf = base_mrf + 2; in emit_repclear_shader()
3502 write->base_mrf = color_mrf; in emit_repclear_shader()
3510 retype(brw_message_reg(base_mrf), BRW_REGISTER_TYPE_UD); in emit_repclear_shader()
3522 write->base_mrf = base_mrf; in emit_repclear_shader()
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| D | brw_vec4_builder.h | 624 inst->base_mrf = 1; in fix_math_instruction()
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| D | brw_fs_visitor.cpp | 110 write->base_mrf = 2; in emit_dummy_fs()
114 write->base_mrf = 0; in emit_dummy_fs()
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| D | brw_fs_bank_conflicts.cpp | 585 const unsigned reg = GFX7_MRF_HACK_START + inst->base_mrf + i; in shader_reg_constraints()
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| D | brw_vec4_nir.cpp | 448 inst->base_mrf = 2; in nir_emit_intrinsic()
454 int param_base = inst->base_mrf; in nir_emit_intrinsic()
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| D | brw_vec4.cpp | 1405 unsigned start = scan_inst->base_mrf; in opt_register_coalesce()
1406 unsigned end = scan_inst->base_mrf + scan_inst->mlen; in opt_register_coalesce()
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| D | brw_inst.h | 839 FC(base_mrf, /* 4+ */ 27, 24, /* 12+ */ -1, -1, devinfo->ver < 6);
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