1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat2 Instructions: one and two src ALU instructions 29 --> 30 31<bitset name="#instruction-cat2" extends="#instruction"> 32 <field name="DST" low="32" high="39" type="#reg-gpr"/> 33 <field name="REPEAT" low="40" high="41" type="#rptN"/> 34 <field name="SAT" pos="42" type="bool" display="(sat)"/> 35 <field name="SS" pos="44" type="bool" display="(ss)"/> 36 <field name="UL" pos="45" type="bool" display="(ul)"/> 37 <field name="DST_CONV" pos="46" type="bool"> 38 <doc> 39 Destination register is opposite precision as source, ie. 40 if {FULL} is true then destination is half precision, and 41 visa versa. 42 </doc> 43 </field> 44 <derived name="DST_HALF" expr="#dest-half" type="bool" display="h"/> 45 <field name="EI" pos="47" type="bool" display="(ei)"/> 46 <field name="FULL" pos="52" type="bool"> 47 <doc>Full precision source registers</doc> 48 </field> 49 <field name="JP" pos="59" type="bool" display="(jp)"/> 50 <field name="SY" pos="60" type="bool" display="(sy)"/> 51 <pattern low="61" high="63">010</pattern> <!-- cat2 --> 52 <!-- 53 NOTE, both SRC1_R and SRC2_R are defined at this level because 54 SRC2_R is still a valid bit for (nopN) (REPEAT==0) for cat2 55 instructions with only a single src 56 --> 57 <field name="SRC1_R" pos="43" type="bool" display="(r)"/> 58 <field name="SRC2_R" pos="51" type="bool" display="(r)"/> 59 <derived name="ZERO" expr="#zero" type="bool" display=""/> 60 <encode> 61 <map name="SAT">!!(src->flags & IR3_INSTR_SAT)</map> 62 <map name="DST_CONV"> 63 ((src->dsts[0]->num >> 2) == 62) ? 0 : 64 !!((src->srcs[0]->flags ^ src->dsts[0]->flags) & IR3_REG_HALF) 65 </map> 66 <map name="EI">!!(src->dsts[0]->flags & IR3_REG_EI)</map> 67 <map name="FULL">!(src->srcs[0]->flags & IR3_REG_HALF)</map> 68 <map name="SRC1_R">extract_SRC1_R(src)</map> 69 <map name="SRC2_R">extract_SRC2_R(src)</map> 70 </encode> 71</bitset> 72 73<bitset name="#instruction-cat2-1src" extends="#instruction-cat2"> 74 <override expr="#cat2-cat3-nop-encoding"> 75 <display> 76 {SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1} 77 </display> 78 <derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/> 79 <field name="SRC1" low="0" high="15" type="#multisrc"> 80 <param name="ZERO" as="SRC_R"/> 81 <param name="FULL"/> 82 </field> 83 </override> 84 <display> 85 {SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1} 86 </display> 87 <pattern low="16" high="31">xxxxxxxxxxxxxxxx</pattern> 88 <pattern low="48" high="50">xxx</pattern> <!-- COND --> 89 <field name="SRC1" low="0" high="15" type="#multisrc"> 90 <param name="SRC1_R" as="SRC_R"/> 91 <param name="FULL"/> 92 </field> 93</bitset> 94 95<!-- TODO rest of cat2-1src --> 96 97<bitset name="#instruction-cat2-2src" extends="#instruction-cat2"> 98 <override expr="#cat2-cat3-nop-encoding"> 99 <display> 100 {SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2} 101 </display> 102 <derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/> 103 <field name="SRC1" low="0" high="15" type="#multisrc"> 104 <param name="ZERO" as="SRC_R"/> 105 <param name="FULL"/> 106 </field> 107 <field name="SRC2" low="16" high="31" type="#multisrc"> 108 <param name="ZERO" as="SRC_R"/> 109 <param name="FULL"/> 110 </field> 111 </override> 112 <display> 113 {SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2} 114 </display> 115 <field name="SRC1" low="0" high="15" type="#multisrc"> 116 <param name="SRC1_R" as="SRC_R"/> 117 <param name="FULL"/> 118 </field> 119 <field name="SRC2" low="16" high="31" type="#multisrc"> 120 <param name="SRC2_R" as="SRC_R"/> 121 <param name="FULL"/> 122 </field> 123 <pattern low="48" high="50">xxx</pattern> <!-- COND --> 124</bitset> 125 126<!-- The cmp*.* instructions additionally have a condition code: --> 127<bitset name="#instruction-cat2-2src-cond" extends="#instruction-cat2"> 128 <override expr="#cat2-cat3-nop-encoding"> 129 <display> 130 {SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME}.{COND} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2} 131 </display> 132 <derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/> 133 <field name="SRC1" low="0" high="15" type="#multisrc"> 134 <param name="ZERO" as="SRC_R"/> 135 <param name="FULL"/> 136 </field> 137 <field name="SRC2" low="16" high="31" type="#multisrc"> 138 <param name="ZERO" as="SRC_R"/> 139 <param name="FULL"/> 140 </field> 141 </override> 142 <display> 143 {SY}{SS}{JP}{SAT}{REPEAT}{UL}{NAME}.{COND} {EI}{DST_HALF}{DST}, {SRC1}, {SRC2} 144 </display> 145 <field name="SRC1" low="0" high="15" type="#multisrc"> 146 <param name="SRC1_R" as="SRC_R"/> 147 <param name="FULL"/> 148 </field> 149 <field name="SRC2" low="16" high="31" type="#multisrc"> 150 <param name="SRC2_R" as="SRC_R"/> 151 <param name="FULL"/> 152 </field> 153 <field name="COND" low="48" high="50" type="#cond"/> 154 <encode> 155 <map name="COND">src->cat2.condition</map> 156 </encode> 157</bitset> 158 159 160<bitset name="add.f" extends="#instruction-cat2-2src"> 161 <pattern low="53" high="58">000000</pattern> 162</bitset> 163 164<bitset name="min.f" extends="#instruction-cat2-2src"> 165 <pattern low="53" high="58">000001</pattern> 166</bitset> 167 168<bitset name="max.f" extends="#instruction-cat2-2src"> 169 <pattern low="53" high="58">000010</pattern> 170</bitset> 171 172<bitset name="mul.f" extends="#instruction-cat2-2src"> 173 <pattern low="53" high="58">000011</pattern> 174</bitset> 175 176<bitset name="sign.f" extends="#instruction-cat2-1src"> 177 <pattern low="53" high="58">000100</pattern> 178</bitset> 179 180<bitset name="cmps.f" extends="#instruction-cat2-2src-cond"> 181 <pattern low="53" high="58">000101</pattern> 182</bitset> 183 184<bitset name="absneg.f" extends="#instruction-cat2-1src"> 185 <pattern low="53" high="58">000110</pattern> 186</bitset> 187 188<bitset name="cmpv.f" extends="#instruction-cat2-2src-cond"> 189 <pattern low="53" high="58">000111</pattern> 190</bitset> 191 192<bitset name="floor.f" extends="#instruction-cat2-1src"> 193 <pattern low="53" high="58">001001</pattern> 194</bitset> 195 196<bitset name="ceil.f" extends="#instruction-cat2-1src"> 197 <pattern low="53" high="58">001010</pattern> 198</bitset> 199 200<bitset name="rndne.f" extends="#instruction-cat2-1src"> 201 <pattern low="53" high="58">001011</pattern> 202</bitset> 203 204<bitset name="rndaz.f" extends="#instruction-cat2-1src"> 205 <pattern low="53" high="58">001100</pattern> 206</bitset> 207 208<bitset name="trunc.f" extends="#instruction-cat2-1src"> 209 <pattern low="53" high="58">001101</pattern> 210</bitset> 211 212<bitset name="add.u" extends="#instruction-cat2-2src"> 213 <pattern low="53" high="58">010000</pattern> 214</bitset> 215 216<bitset name="add.s" extends="#instruction-cat2-2src"> 217 <pattern low="53" high="58">010001</pattern> 218</bitset> 219 220<bitset name="sub.u" extends="#instruction-cat2-2src"> 221 <pattern low="53" high="58">010010</pattern> 222</bitset> 223 224<bitset name="sub.s" extends="#instruction-cat2-2src"> 225 <pattern low="53" high="58">010011</pattern> 226</bitset> 227 228<bitset name="cmps.u" extends="#instruction-cat2-2src-cond"> 229 <pattern low="53" high="58">010100</pattern> 230</bitset> 231 232<bitset name="cmps.s" extends="#instruction-cat2-2src-cond"> 233 <pattern low="53" high="58">010101</pattern> 234</bitset> 235 236<bitset name="min.u" extends="#instruction-cat2-2src"> 237 <pattern low="53" high="58">010110</pattern> 238</bitset> 239 240<bitset name="min.s" extends="#instruction-cat2-2src"> 241 <pattern low="53" high="58">010111</pattern> 242</bitset> 243 244<bitset name="max.u" extends="#instruction-cat2-2src"> 245 <pattern low="53" high="58">011000</pattern> 246</bitset> 247 248<bitset name="max.s" extends="#instruction-cat2-2src"> 249 <pattern low="53" high="58">011001</pattern> 250</bitset> 251 252<bitset name="absneg.s" extends="#instruction-cat2-1src"> 253 <pattern low="53" high="58">011010</pattern> 254</bitset> 255 256<bitset name="and.b" extends="#instruction-cat2-2src"> 257 <pattern low="53" high="58">011100</pattern> 258</bitset> 259 260<bitset name="or.b" extends="#instruction-cat2-2src"> 261 <pattern low="53" high="58">011101</pattern> 262</bitset> 263 264<bitset name="not.b" extends="#instruction-cat2-1src"> 265 <pattern low="53" high="58">011110</pattern> 266</bitset> 267 268<bitset name="xor.b" extends="#instruction-cat2-2src"> 269 <pattern low="53" high="58">011111</pattern> 270</bitset> 271 272<bitset name="cmpv.u" extends="#instruction-cat2-2src-cond"> 273 <pattern low="53" high="58">100001</pattern> 274</bitset> 275 276<bitset name="cmpv.s" extends="#instruction-cat2-2src-cond"> 277 <pattern low="53" high="58">100010</pattern> 278</bitset> 279 280<bitset name="mul.u24" extends="#instruction-cat2-2src"> 281 <pattern low="53" high="58">110000</pattern> 282</bitset> 283 284<bitset name="mul.s24" extends="#instruction-cat2-2src"> 285 <pattern low="53" high="58">110001</pattern> 286</bitset> 287 288<bitset name="mull.u" extends="#instruction-cat2-2src"> 289 <pattern low="53" high="58">110010</pattern> 290</bitset> 291 292<bitset name="bfrev.b" extends="#instruction-cat2-1src"> 293 <pattern low="53" high="58">110011</pattern> 294</bitset> 295 296<bitset name="clz.s" extends="#instruction-cat2-1src"> 297 <pattern low="53" high="58">110100</pattern> 298</bitset> 299 300<bitset name="clz.b" extends="#instruction-cat2-1src"> 301 <pattern low="53" high="58">110101</pattern> 302</bitset> 303 304<bitset name="shl.b" extends="#instruction-cat2-2src"> 305 <pattern low="53" high="58">110110</pattern> 306</bitset> 307 308<bitset name="shr.b" extends="#instruction-cat2-2src"> 309 <pattern low="53" high="58">110111</pattern> 310</bitset> 311 312<bitset name="ashr.b" extends="#instruction-cat2-2src"> 313 <pattern low="53" high="58">111000</pattern> 314</bitset> 315 316<bitset name="bary.f" extends="#instruction-cat2-2src"> 317 <pattern low="53" high="58">111001</pattern> 318</bitset> 319 320<bitset name="mgen.b" extends="#instruction-cat2-2src"> 321 <pattern low="53" high="58">111010</pattern> 322</bitset> 323 324<bitset name="getbit.b" extends="#instruction-cat2-2src"> 325 <pattern low="53" high="58">111011</pattern> 326</bitset> 327 328<bitset name="setrm" extends="#instruction-cat2-1src"> 329 <pattern low="53" high="58">111100</pattern> 330</bitset> 331 332<bitset name="cbits.b" extends="#instruction-cat2-1src"> 333 <pattern low="53" high="58">111101</pattern> 334</bitset> 335 336<bitset name="shb" extends="#instruction-cat2-2src"> 337 <pattern low="53" high="58">111110</pattern> 338</bitset> 339 340<bitset name="msad" extends="#instruction-cat2-2src"> 341 <pattern low="53" high="58">111111</pattern> 342</bitset> 343 344</isa> 345