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Searched refs:alpha_mode_0 (Results 1 – 12 of 12) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/video/rockchip/rga2/
Drga2_reg_info.c1113 (s_RGA2_ALPHA_CTRL1_SW_DST_COLOR_M0(msg->alpha_mode_0 >> RGA2_INDEX_FIF))); in RGA2_set_reg_alpha_info()
1115 (s_RGA2_ALPHA_CTRL1_SW_SRC_COLOR_M0(msg->alpha_mode_0 >> RGA2_INDEX_SE))); in RGA2_set_reg_alpha_info()
1117 (s_RGA2_ALPHA_CTRL1_SW_DST_FACTOR_M0(msg->alpha_mode_0 >> RGA2_INDEX_TWE))); in RGA2_set_reg_alpha_info()
1119 (s_RGA2_ALPHA_CTRL1_SW_SRC_FACTOR_M0(msg->alpha_mode_0 >> RGA2_INDEX_FO))); in RGA2_set_reg_alpha_info()
1121 (s_RGA2_ALPHA_CTRL1_SW_DST_ALPHA_CAL_M0(msg->alpha_mode_0 >> RGA2_INDEX_EIE))); in RGA2_set_reg_alpha_info()
1123 (s_RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_CAL_M0(msg->alpha_mode_0 >> RGA2_INDEX_TH))); in RGA2_set_reg_alpha_info()
1125 (s_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M0(msg->alpha_mode_0 >> RGA2_INDEX_NI))); in RGA2_set_reg_alpha_info()
1127 …RGA2_ALPHA_CTRL1_SW_SRC_BLEND_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_BLEND_M0(msg->alpha_mode_0 >> 1))); in RGA2_set_reg_alpha_info()
1129 (s_RGA2_ALPHA_CTRL1_SW_DST_ALPHA_M0(msg->alpha_mode_0 >> RGA2_INDEX_EI))); in RGA2_set_reg_alpha_info()
1131 …RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_M0(msg->alpha_mode_0 >> 0))); in RGA2_set_reg_alpha_info()
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Drga2_drv.c131 static const char *rga2_get_blend_mode_str(u16 alpha_rop_flag, u16 alpha_mode_0, u16 alpha_mode_1) in rga2_get_blend_mode_str() argument
136 if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A) { in rga2_get_blend_mode_str()
138 } else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A) { in rga2_get_blend_mode_str()
347 …INFO("alpha : flag %x mode0=%x mode1=%x\n", req->alpha_rop_flag, req->alpha_mode_0, req->alpha_mod… in print_debug_info()
348 …INFO("blend mode is %s\n", rga2_get_blend_mode_str(req->alpha_rop_flag, req->alpha_mode_0, req->al… in print_debug_info()
Drga2.h493 u16 alpha_mode_0; /* [0] SrcAlphaMode0 */ member
Drga2_mmu_info.c1180 } else if (req->alpha_mode_0 != 0 && req->bitblt_mode == 0) { in rga2_mmu_info_BitBlt_mode()
/device/board/isoftstone/yangfan/kernel/src/driv/video/rockchip/rga2/
Drga2_reg_info.c740 …GA2_ALPHA_CTRL1_SW_DST_COLOR_M0)) | (s_RGA2_ALPHA_CTRL1_SW_DST_COLOR_M0(msg->alpha_mode_0 >> 15))); in RGA2_set_reg_alpha_info()
741 …RGA2_ALPHA_CTRL1_SW_SRC_COLOR_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_COLOR_M0(msg->alpha_mode_0 >> 7))); in RGA2_set_reg_alpha_info()
742 …2_ALPHA_CTRL1_SW_DST_FACTOR_M0)) | (s_RGA2_ALPHA_CTRL1_SW_DST_FACTOR_M0(msg->alpha_mode_0 >> 12))); in RGA2_set_reg_alpha_info()
743 …A2_ALPHA_CTRL1_SW_SRC_FACTOR_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_FACTOR_M0(msg->alpha_mode_0 >> 4))); in RGA2_set_reg_alpha_info()
744 …A_CTRL1_SW_DST_ALPHA_CAL_M0)) | (s_RGA2_ALPHA_CTRL1_SW_DST_ALPHA_CAL_M0(msg->alpha_mode_0 >> 11))); in RGA2_set_reg_alpha_info()
745 …HA_CTRL1_SW_SRC_ALPHA_CAL_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_CAL_M0(msg->alpha_mode_0 >> 3))); in RGA2_set_reg_alpha_info()
746 …RGA2_ALPHA_CTRL1_SW_DST_BLEND_M0)) | (s_RGA2_ALPHA_CTRL1_SW_DST_BLEND_M0(msg->alpha_mode_0 >> 9))); in RGA2_set_reg_alpha_info()
747 …RGA2_ALPHA_CTRL1_SW_SRC_BLEND_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_BLEND_M0(msg->alpha_mode_0 >> 1))); in RGA2_set_reg_alpha_info()
748 …RGA2_ALPHA_CTRL1_SW_DST_ALPHA_M0)) | (s_RGA2_ALPHA_CTRL1_SW_DST_ALPHA_M0(msg->alpha_mode_0 >> 8))); in RGA2_set_reg_alpha_info()
749 …RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_M0)) | (s_RGA2_ALPHA_CTRL1_SW_SRC_ALPHA_M0(msg->alpha_mode_0 >> 0))); in RGA2_set_reg_alpha_info()
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Drga2_drv.c131 static const char *rga2_get_blend_mode_str(u16 alpha_rop_flag, u16 alpha_mode_0, in rga2_get_blend_mode_str() argument
137 if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A) in rga2_get_blend_mode_str()
139 else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A) in rga2_get_blend_mode_str()
354 req->alpha_rop_flag, req->alpha_mode_0, req->alpha_mode_1); in print_debug_info()
357 req->alpha_mode_0, req->alpha_mode_1)); in print_debug_info()
Drga2.h533 u16 alpha_mode_0; /* [0] SrcAlphaMode0 */ member
Drga2_mmu_info.c1298 } else if (req->alpha_mode_0 != 0 && req->bitblt_mode == 0) { in rga2_mmu_info_BitBlt_mode()
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/rga3/
Drga3_reg_info.c1084 (msg->alpha_mode_0 >> 7))); in RGA3_set_reg_overlap_info()
1088 (msg->alpha_mode_0 >> 0))); in RGA3_set_reg_overlap_info()
1092 (msg->alpha_mode_0 >> 1))); in RGA3_set_reg_overlap_info()
1096 (msg->alpha_mode_0 >> 3))); in RGA3_set_reg_overlap_info()
1100 (msg->alpha_mode_0 >> 4))); in RGA3_set_reg_overlap_info()
1111 (msg->alpha_mode_0 >> 15))); in RGA3_set_reg_overlap_info()
1115 (msg->alpha_mode_0 >> 8))); in RGA3_set_reg_overlap_info()
1119 (msg->alpha_mode_0 >> 9))); in RGA3_set_reg_overlap_info()
1123 (msg->alpha_mode_0 >> 11))); in RGA3_set_reg_overlap_info()
1127 (msg->alpha_mode_0 >> 12))); in RGA3_set_reg_overlap_info()
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Drga2_reg_info.c1270 (msg->alpha_mode_0 >> 15))); in RGA2_set_reg_alpha_info()
1274 (msg->alpha_mode_0 >> 7))); in RGA2_set_reg_alpha_info()
1278 (msg->alpha_mode_0 >> 12))); in RGA2_set_reg_alpha_info()
1282 (msg->alpha_mode_0 >> 4))); in RGA2_set_reg_alpha_info()
1286 (msg->alpha_mode_0 >> 11))); in RGA2_set_reg_alpha_info()
1290 (msg->alpha_mode_0 >> 3))); in RGA2_set_reg_alpha_info()
1294 (msg->alpha_mode_0 >> 9))); in RGA2_set_reg_alpha_info()
1298 (msg->alpha_mode_0 >> 1))); in RGA2_set_reg_alpha_info()
1302 (msg->alpha_mode_0 >> 8))); in RGA2_set_reg_alpha_info()
1306 (msg->alpha_mode_0 >> 0))); in RGA2_set_reg_alpha_info()
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Drga2_mmu_info.c733 if (req->alpha_mode_0 != 0 && req->bitblt_mode == 0) in rga2_mmu_info_BitBlt_mode()
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/rga3/include/
Drga.h524 u16 alpha_mode_0; member
619 u16 alpha_mode_0; member