/device/board/isoftstone/yangfan/kernel/src/driv/phy/ |
D | phy-rockchip-inno-combphy.c | 38 u32 bitstart; member 121 mask = GENMASK(reg->bitend, reg->bitstart); in param_read() 122 tmp = (orig & mask) >> reg->bitstart; in param_read() 133 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 134 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 225 grfcfg->pipe_pll_lock.bitstart); in rockchip_combphy_pll_lock() 228 val = (val & mask) >> grfcfg->pipe_pll_lock.bitstart; in rockchip_combphy_pll_lock() 240 grfcfg->pipe_status_l0.bitstart); in rockchip_combphy_is_ready() 243 val = (val & mask) >> grfcfg->pipe_status_l0.bitstart; in rockchip_combphy_is_ready()
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D | phy-rockchip-inno-usb3.c | 86 unsigned int bitstart; member 161 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 162 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 174 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in param_exped() 180 tmp = (orig & mask) >> reg->bitstart; in param_exped() 566 u3phy->cfgs->grfcfg.um_hstdct.bitstart + 1; in rockchip_u3phy_um_sm_work() 584 u3phy->cfgs->grfcfg.um_hstdct.bitstart); in rockchip_u3phy_um_sm_work() 586 u3phy->cfgs->grfcfg.um_ls.bitstart); in rockchip_u3phy_um_sm_work() 589 state = ((uhd & uhd_mask) >> u3phy->cfgs->grfcfg.um_hstdct.bitstart) | in rockchip_u3phy_um_sm_work() 590 (((ul & ul_mask) >> u3phy->cfgs->grfcfg.um_ls.bitstart) << sh); in rockchip_u3phy_um_sm_work()
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D | phy-rockchip-naneng-combphy.c | 28 u16 bitstart; member 100 mask = GENMASK(reg->bitend, reg->bitstart); in param_read() 101 tmp = (orig & mask) >> reg->bitstart; in param_read() 112 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 113 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 124 cfg->pipe_phy_status.bitstart); in rockchip_combphy_is_ready() 127 val = (val & mask) >> cfg->pipe_phy_status.bitstart; in rockchip_combphy_is_ready()
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D | phy-rockchip-naneng-usb2.c | 64 unsigned int bitstart; member 261 mask = GENMASK(reg->bitend, reg->bitstart); in property_enable() 262 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in property_enable() 272 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in property_enabled() 278 tmp = (orig & mask) >> reg->bitstart; in property_enabled()
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D | phy-rockchip-usbdp.c | 51 unsigned int bitstart; member 241 mask = GENMASK(reg->bitend, reg->bitstart); in grfreg_write() 242 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in grfreg_write()
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/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
D | phy-rockchip-inno-usb3.c | 86 unsigned int bitstart; member 161 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 162 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 174 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in param_exped() 180 tmp = (orig & mask) >> reg->bitstart; in param_exped() 566 u3phy->cfgs->grfcfg.um_hstdct.bitstart + 1; in rockchip_u3phy_um_sm_work() 584 u3phy->cfgs->grfcfg.um_hstdct.bitstart); in rockchip_u3phy_um_sm_work() 586 u3phy->cfgs->grfcfg.um_ls.bitstart); in rockchip_u3phy_um_sm_work() 589 state = ((uhd & uhd_mask) >> u3phy->cfgs->grfcfg.um_hstdct.bitstart) | in rockchip_u3phy_um_sm_work() 590 (((ul & ul_mask) >> u3phy->cfgs->grfcfg.um_ls.bitstart) << sh); in rockchip_u3phy_um_sm_work()
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D | phy-rockchip-naneng-combphy.c | 28 u16 bitstart; member 100 mask = GENMASK(reg->bitend, reg->bitstart); in param_read() 101 tmp = (orig & mask) >> reg->bitstart; in param_read() 112 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 113 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 124 cfg->pipe_phy_status.bitstart); in rockchip_combphy_is_ready() 127 val = (val & mask) >> cfg->pipe_phy_status.bitstart; in rockchip_combphy_is_ready()
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D | phy-rockchip-usbdp.c | 51 unsigned int bitstart; member 241 mask = GENMASK(reg->bitend, reg->bitstart); in grfreg_write() 242 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in grfreg_write()
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/device/soc/rockchip/common/vendor/drivers/phy/ |
D | phy-rockchip-inno-usb3.c | 88 unsigned int bitstart; member 158 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 159 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 169 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in param_exped() 176 tmp = (orig & mask) >> reg->bitstart; in param_exped() 553 …unsigned int sh = u3phy->cfgs->grfcfg.um_hstdct.bitend - u3phy->cfgs->grfcfg.um_hstdct.bitstart + … in rockchip_u3phy_um_sm_work() 570 … uhd_mask = GENMASK(u3phy->cfgs->grfcfg.um_hstdct.bitend, u3phy->cfgs->grfcfg.um_hstdct.bitstart); in rockchip_u3phy_um_sm_work() 571 ul_mask = GENMASK(u3phy->cfgs->grfcfg.um_ls.bitend, u3phy->cfgs->grfcfg.um_ls.bitstart); in rockchip_u3phy_um_sm_work() 574 state = ((uhd & uhd_mask) >> u3phy->cfgs->grfcfg.um_hstdct.bitstart) | in rockchip_u3phy_um_sm_work() 575 (((ul & ul_mask) >> u3phy->cfgs->grfcfg.um_ls.bitstart) << sh); in rockchip_u3phy_um_sm_work()
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D | phy-rockchip-naneng-combphy.c | 28 u16 bitstart; member 100 mask = GENMASK(reg->bitend, reg->bitstart); in param_read() 101 tmp = (orig & mask) >> reg->bitstart; in param_read() 111 mask = GENMASK(reg->bitend, reg->bitstart); in param_write() 112 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write() 122 mask = GENMASK(cfg->pipe_phy_status.bitend, cfg->pipe_phy_status.bitstart); in rockchip_combphy_is_ready() 125 val = (val & mask) >> cfg->pipe_phy_status.bitstart; in rockchip_combphy_is_ready()
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D | phy-rockchip-usbdp.c | 52 unsigned int bitstart; member 172 mask = GENMASK(reg->bitend, reg->bitstart); in grfreg_write() 173 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in grfreg_write()
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/device/soc/rockchip/common/sdk_linux/drivers/phy/rockchip/ |
D | phy-rockchip-inno-usb2.c | 84 unsigned int bitstart; member 329 mask = GENMASK(reg->bitend, reg->bitstart); in property_enable() 330 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in property_enable() 339 unsigned int mask = GENMASK(reg->bitend, reg->bitstart); in property_enabled() 346 tmp = (orig & mask) >> reg->bitstart; in property_enabled() 1372 mask = GENMASK(phy_sus_reg->bitend, phy_sus_reg->bitstart); in rockchip_chg_detect_work() 1428 ul_mask = GENMASK(rport->port_cfg->utmi_ls.bitend, rport->port_cfg->utmi_ls.bitstart); in rockchip_usb2phy_sm_work() 1436 … uhd_mask = GENMASK(rport->port_cfg->utmi_hstdet.bitend, rport->port_cfg->utmi_hstdet.bitstart); in rockchip_usb2phy_sm_work() 1438 sh = rport->port_cfg->utmi_hstdet.bitend - rport->port_cfg->utmi_hstdet.bitstart + 1; in rockchip_usb2phy_sm_work() 1440 state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | in rockchip_usb2phy_sm_work() [all …]
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/device/board/hihope/dayu210/kernel/kernel_patch/linux-5.10/dayu210_patch/ |
D | kernel.patch | 47247 + mask = GENMASK(phy_sus_reg->bitend, phy_sus_reg->bitstart); 47277 - rport->port_cfg->utmi_hstdet.bitstart + 1; 47301 - rport->port_cfg->utmi_hstdet.bitstart); 47303 rport->port_cfg->utmi_ls.bitstart); 47306 - state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | 47307 - (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh); 47314 + rport->port_cfg->utmi_hstdet.bitstart); 47317 + rport->port_cfg->utmi_hstdet.bitstart + 1; 47319 + state = ((uhd & uhd_mask) >> rport->port_cfg->utmi_hstdet.bitstart) | 47320 + (((ul & ul_mask) >> rport->port_cfg->utmi_ls.bitstart) << sh); [all …]
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