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Searched refs:y_base_ad_init (Results 1 – 25 of 25) sorted by relevance

/device/board/isoftstone/yangfan/kernel/src/driv/media/isp/
Ddmarx.c208 .y_base_ad_init = CIF_MI_DMA_Y_PIC_START_AD,
219 .y_base_ad_init = MI_RAW0_RD_BASE,
230 .y_base_ad_init = MI_RAW1_RD_BASE,
241 .y_base_ad_init = MI_RAW2_RD_BASE,
373 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
377 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
Dcapture_v30.c83 .y_base_ad_init = ISP3X_MPFBC_HEAD_PTR,
104 .y_base_ad_init = ISP3X_MI_BP_WR_Y_BASE,
586 reg = stream->config->mi.y_base_ad_init; in update_mi()
604 reg = stream->config->mi.y_base_ad_init; in update_mi()
630 reg = stream->config->mi.y_base_ad_init; in update_mi()
652 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
659 rkisp_next_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture_v21.c137 .y_base_ad_init = MI_RAW0_WR_BASE,
154 .y_base_ad_init = MI_RAW1_WR_BASE,
171 .y_base_ad_init = MI_RAW3_WR_BASE,
668 rkisp_read(dev, stream->config->mi.y_base_ad_init, true), in update_dmatx_v2()
682 rkisp_write(dev, stream->config->mi.y_base_ad_init, in update_mi()
694 rkisp_write(dev, stream->config->mi.y_base_ad_init, in update_mi()
709 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture.h182 u32 y_base_ad_init; member
Dcapture_v20.c137 .y_base_ad_init = MI_RAW0_WR_BASE,
154 .y_base_ad_init = MI_RAW1_WR_BASE,
171 .y_base_ad_init = MI_RAW2_WR_BASE,
188 .y_base_ad_init = MI_RAW3_WR_BASE,
770 readl(base + stream->config->mi.y_base_ad_init), in update_dmatx_v2()
803 readl(base + stream->config->mi.y_base_ad_init), in update_mi()
Dcapture.c799 .y_base_ad_init = CIF_MI_MP_Y_BASE_AD_INIT,
856 .y_base_ad_init = CIF_MI_SP_Y_BASE_AD_INIT,
Dcapture_v1x.c357 readl(base + stream->config->mi.y_base_ad_init), in update_mi()
Drkisp.c2630 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
2634 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
Dregs.h1698 writel(val, base + stream->config->mi.y_base_ad_init); in mi_set_y_addr()
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
Ddmarx.c237 .y_base_ad_init = CIF_MI_DMA_Y_PIC_START_AD,
249 .y_base_ad_init = MI_RAW0_RD_BASE,
261 .y_base_ad_init = MI_RAW1_RD_BASE,
273 .y_base_ad_init = MI_RAW2_RD_BASE,
390 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
393 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
Dcapture_v30.c81 .y_base_ad_init = ISP3X_MPFBC_HEAD_PTR,
104 .y_base_ad_init = ISP3X_MI_BP_WR_Y_BASE,
557 reg = stream->config->mi.y_base_ad_init; in update_mi()
574 reg = stream->config->mi.y_base_ad_init; in update_mi()
600 reg = stream->config->mi.y_base_ad_init; in update_mi()
622 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
627 stream->id, rkisp_next_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture_v21.c157 .y_base_ad_init = MI_RAW0_WR_BASE,
176 .y_base_ad_init = MI_RAW1_WR_BASE,
195 .y_base_ad_init = MI_RAW3_WR_BASE,
661 rkisp_read(dev, stream->config->mi.y_base_ad_init, true), in update_dmatx_v2()
675 …rkisp_write(dev, stream->config->mi.y_base_ad_init, stream->next_buf->buff_addr[RKISP_PLANE_Y], fa… in update_mi()
684 rkisp_write(dev, stream->config->mi.y_base_ad_init, dummy_buf->dma_addr, false); in update_mi()
695 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture.h178 u32 y_base_ad_init; member
Dcapture.c811 .y_base_ad_init = CIF_MI_MP_Y_BASE_AD_INIT,
871 .y_base_ad_init = CIF_MI_SP_Y_BASE_AD_INIT,
Dcapture_v1x.c342 … readl(base + stream->config->mi.y_base_ad_init), readl(base + stream->config->mi.cb_base_ad_init), in update_mi()
Drkisp.c2613 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
2616 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
Dregs.h1675 writel(val, base + stream->config->mi.y_base_ad_init); in mi_set_y_addr()
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
Ddmarx.c208 .y_base_ad_init = CIF_MI_DMA_Y_PIC_START_AD,
219 .y_base_ad_init = MI_RAW0_RD_BASE,
230 .y_base_ad_init = MI_RAW1_RD_BASE,
241 .y_base_ad_init = MI_RAW2_RD_BASE,
373 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
377 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in update_rawrd()
Dcapture_v30.c83 .y_base_ad_init = ISP3X_MPFBC_HEAD_PTR,
104 .y_base_ad_init = ISP3X_MI_BP_WR_Y_BASE,
586 reg = stream->config->mi.y_base_ad_init; in update_mi()
604 reg = stream->config->mi.y_base_ad_init; in update_mi()
630 reg = stream->config->mi.y_base_ad_init; in update_mi()
652 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
659 rkisp_next_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture_v21.c137 .y_base_ad_init = MI_RAW0_WR_BASE,
154 .y_base_ad_init = MI_RAW1_WR_BASE,
171 .y_base_ad_init = MI_RAW3_WR_BASE,
668 rkisp_read(dev, stream->config->mi.y_base_ad_init, true), in update_dmatx_v2()
682 rkisp_write(dev, stream->config->mi.y_base_ad_init, in update_mi()
694 rkisp_write(dev, stream->config->mi.y_base_ad_init, in update_mi()
709 rkisp_read(dev, stream->config->mi.y_base_ad_init, false), in update_mi()
Dcapture.h182 u32 y_base_ad_init; member
Dcapture.c799 .y_base_ad_init = CIF_MI_MP_Y_BASE_AD_INIT,
856 .y_base_ad_init = CIF_MI_SP_Y_BASE_AD_INIT,
Dcapture_v1x.c357 readl(base + stream->config->mi.y_base_ad_init), in update_mi()
Drkisp.c2630 rkisp_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
2634 rkisp_next_write(dev, stream->config->mi.y_base_ad_init, val, false); in rkisp_rx_buf_pool_init()
Dregs.h1698 writel(val, base + stream->config->mi.y_base_ad_init); in mi_set_y_addr()