/kernel/linux/linux-5.10/arch/arm/mach-imx/ |
D | suspend-imx6.S | 76 ldr r11, [r0, #PM_INFO_MX6Q_L2_V_OFFSET] 82 ldr r6, [r11, #L2X0_CACHE_SYNC] 97 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET] 98 ldr r7, =PM_INFO_MMDC_IO_VAL_OFFSET 101 ldr r8, [r7], #0x4 102 ldr r9, [r7], #0x4 115 ldr r7, =MX6Q_MMDC_MPDGCTRL0 116 ldr r6, [r11, r7] 120 ldr r6, [r11, r7] 125 ldr r6, [r11, r7] [all …]
|
D | suspend-imx53.S | 45 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET] 50 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET] 53 ldr r5, [r2], #12 /* IOMUXC register offset */ 54 ldr r6, [r3, r5] /* current value */ 61 ldr r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET] 62 ldr r2,[r1, #M4IF_MCR0_OFFSET] 68 ldr r2,[r1, #M4IF_MCR0_OFFSET] 73 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET] 78 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET] 81 ldr r5, [r2], #4 /* IOMUXC register offset */ [all …]
|
D | ssi-fiq.S | 42 ldr r12, .L_imx_ssi_fiq_base 45 ldr r13, .L_imx_ssi_fiq_tx_buffer 48 ldr r11, [r12, #SSI_SIER] 53 ldr r11, [r12, #SSI_SISR] 84 ldr r11, [r12, #SSI_SIER] 89 ldr r11, [r12, #SSI_SISR] 93 ldr r13, .L_imx_ssi_fiq_rx_buffer 101 ldr r11, [r12, #SSI_SACNT] 104 ldr r11, [r12, #SSI_SRX0] 107 ldr r11, [r12, #SSI_SRX0] [all …]
|
/kernel/linux/linux-5.10/drivers/memory/ |
D | ti-emif-sram-pm.S | 53 ldr r0, [r4, #EMIF_PM_BASE_ADDR_VIRT_OFFSET] 54 ldr r2, [r4, #EMIF_PM_REGS_VIRT_OFFSET] 57 ldr r1, [r0, #EMIF_SDRAM_CONFIG] 60 ldr r1, [r0, #EMIF_SDRAM_REFRESH_CONTROL] 63 ldr r1, [r0, #EMIF_SDRAM_TIMING_1] 66 ldr r1, [r0, #EMIF_SDRAM_TIMING_2] 69 ldr r1, [r0, #EMIF_SDRAM_TIMING_3] 72 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL] 75 ldr r1, [r0, #EMIF_POWER_MANAGEMENT_CTRL_SHDW] 78 ldr r1, [r0, #EMIF_SDRAM_OUTPUT_IMPEDANCE_CALIBRATION_CONFIG] [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-at91/ |
D | pm_suspend.S | 27 1: ldr tmp1, [pmc, #AT91_PMC_SR] 36 1: ldr tmp1, [pmc, #AT91_PMC_SR] 45 1: ldr tmp1, [pmc, #AT91_PMC_SR] 87 ldr tmp1, [r0, #PM_DATA_PMC] 89 ldr tmp1, [r0, #PM_DATA_RAMC0] 91 ldr tmp1, [r0, #PM_DATA_RAMC1] 93 ldr tmp1, [r0, #PM_DATA_MEMCTRL] 95 ldr tmp1, [r0, #PM_DATA_MODE] 97 ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET] 99 ldr tmp1, [r0, #PM_DATA_PMC_VERSION] [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
D | sleep43xx.S | 69 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 74 ldr r1, get_l2cache_base 87 ldr r1, kernel_flush 104 ldr r1, kernel_flush 120 ldr r3, [r4, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 123 ldr r0, [r2, #L2X0_AUX_CTRL] 125 ldr r0, [r2, #L310_PREFETCH_CTRL] 128 ldr r0, l2_val 131 ldr r0, [r2, #L2X0_CLEAN_INV_WAY] 132 ldr r1, l2_val [all …]
|
D | sleep34xx.S | 76 ldr r2, [r3] @ value for offset 145 ldr r4, omap3_do_wfi_sram_addr 146 ldr r5, [r4] 162 ldr r1, kernel_flush 181 ldr r1, kernel_flush 206 ldr r4, sdrc_power @ read the SDRC_POWER register 207 ldr r5, [r4] @ read the contents of SDRC_POWER 252 ldr r4, cm_idlest_ckgen 254 ldr r5, [r4] 258 ldr r4, cm_idlest1_core [all …]
|
D | sleep33xx.S | 36 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 47 ldr r1, kernel_flush 63 ldr r1, kernel_flush 67 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 68 ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] 77 ldr r3, [r9, #EMIF_PM_ENTER_SR_OFFSET] 85 ldr r3, [r9, #EMIF_PM_SAVE_CONTEXT_OFFSET] 94 ldr r1, virt_emif_clkctrl 95 ldr r2, [r1] 99 ldr r1, virt_emif_clkctrl [all …]
|
D | sleep44xx.S | 71 ldr r9, [r0, #OMAP_TYPE_OFFSET] 77 ldr r12, =OMAP4_MON_SCU_PWR_INDEX 105 ldr r9, [r8, #OMAP_TYPE_OFFSET] 114 ldr r12, =OMAP4_MON_SCU_PWR_INDEX 159 ldr r0, =0xffff 162 ldr r0, [r2, #L2X0_CLEAN_INV_WAY] 163 ldr r1, =0xffff 177 ldr r0, [r2, #L2X0_CACHE_SYNC] 208 ldr r9, [r8, #OMAP_TYPE_OFFSET] 214 ldr r12, =OMAP4_MON_SCU_PWR_INDEX [all …]
|
D | sram242x.S | 37 ldr r2, omap242x_sdi_cm_clksel2_pll @ get address of dpllout reg 46 ldr r11, omap242x_sdi_sdrc_dlla_ctrl @ addr of dlla ctrl 47 ldr r10, [r11] @ get current val 59 ldr r10, [r11] @ get locked value 97 ldr r4, omap242x_sdi_prcm_voltctrl @ get addr of volt ctrl. 98 ldr r5, [r4] @ get value. 99 ldr r6, prcm_mask_val @ get value of mask 107 ldr r3, omap242x_sdi_timer_32ksynct_cr @ get addr of counter 108 ldr r5, [r3] @ get value 111 ldr r7, [r3] @ get timer value [all …]
|
/kernel/linux/linux-5.10/drivers/soc/bcm/brcmstb/pm/ |
D | s2-arm.S | 30 ldr r0, [DDR_PHY_STATUS_REG] 33 ldr r0, =PM_S2_COMMAND 34 ldr r1, =0 36 ldr r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] 38 ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] 45 1: ldr r0, [DDR_PHY_STATUS_REG] 50 ldr r0, =1 52 ldr r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS] 54 ldr r0, =0 56 ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] [all …]
|
/kernel/linux/linux-5.10/arch/arm/kernel/ |
D | entry-ftrace.S | 38 ldr r0, =ftrace_trace_function 39 ldr r2, [r0] 45 ldr r1, =ftrace_graph_return 46 ldr r2, [r1] 50 ldr r1, =ftrace_graph_entry 51 ldr r2, [r1] 52 ldr r0, =ftrace_graph_entry_stub 73 ldr lr, [sp, #8] @ get previous LR 90 ldr r2, =function_trace_op 91 ldr r2, [r2] @ pointer to the current [all …]
|
D | head-nommu.S | 61 ldr r9, =BASEADDR_V7M_SCB 62 ldr r9, [r9, V7M_SCB_CPUID] 64 ldr r9, =CONFIG_PROCESSOR_ID 75 ldr r12, [r10, #PROCINFO_INITFUNC] 78 1: ldr lr, =__mmap_switched 98 ldr r9, =CONFIG_PROCESSOR_ID 106 ldr r7, __secondary_data 113 ldr r12, [r10, #PROCINFO_INITFUNC] 117 ldr sp, [r7, #12] @ set up the stack pointer 135 M_CLASS(ldr r3, [r12, 0x50]) [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-davinci/ |
D | sleep.S | 43 ldr ip, CACHE_FLUSH 53 ldr ip, [r0, #DDR2_SDRCR_OFFSET] 58 ldr ip, [r0, #DDR2_SDRCR_OFFSET] 73 ldr ip, [r3, #PLLDIV1] 78 ldr ip, [r3, #PLLCTL] 89 ldr ip, [r3, #PLLCTL] 94 ldr ip, [r4] 102 ldr ip, [r4] 109 ldr ip, [r3, #PLLCTL] 114 ldr ip, [r3, #PLLCTL] [all …]
|
/kernel/linux/linux-5.10/arch/arm/lib/ |
D | io-readsw-armv3.S | 21 ldr r3, [r0] 42 .Linsw_8_lp: ldr r3, [r0] 44 ldr r4, [r0] 47 ldr r4, [r0] 49 ldr r5, [r0] 52 ldr r5, [r0] 54 ldr r6, [r0] 57 ldr r6, [r0] 59 ldr lr, [r0] 73 ldr r3, [r0] [all …]
|
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/ |
D | los_dispatch.S | 65 ldr r4, =OS_NVIC_SYSPRI2 66 ldr r5, =OS_NVIC_PENDSV_PRI 72 ldr r1, =g_losTask 73 ldr r0, [r1, #4] 74 ldr r12, [r0] 76 ldr.w r1, =OS_FPU_CPACR 77 ldr r1, [r1] 142 ldr r0, =OS_NVIC_INT_CTRL 143 ldr r1, =OS_NVIC_PENDSVSET 177 ldr.w r3, =OS_FPU_CPACR [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
D | sleep-tegra30.S | 75 ldr \rd, [\base, #EMC_ADR_CFG] 85 ldr \rd, [\base, #EMC_EMC_STATUS] 91 ldr \rd, [\r_car_base, #\pll_base] 97 ldr \rd, [\r_car_base, #\pll_misc] 100 ldr \rd, [\r_car_base, #\pll_misc] 101 ldr \rd, [\r_car_base, #\pll_misc] 109 ldr \rd, [\r_car_base, #\pll_base] 115 ldr \rd, [\car, #\iddq] 121 ldr \rd, [\car, #\iddq] 186 ldr r3, [r1] @ read CSR [all …]
|
D | sleep-tegra20.S | 47 ldr \rd, [\r_car_base, #\pll_base] 54 ldr \rd, [\base, #EMC_ADR_CFG] 92 ldr r3, =TEGRA_FLOW_CTRL_VIRT 95 ldr r2, [r3, r1] 100 ldr r3, =TEGRA_CLK_RESET_VIRT 188 ldr r6, tegra20_sdram_pad_size 190 ldr r7, [r2, r5] @ r7 is the addr in the pad_address 192 ldr r1, [r4, r5] 202 ldr r1, [r7] 207 ldr r4, [r4] [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-exynos/ |
D | sleep.S | 38 ldr r1, =CPU_MASK 40 ldr r1, =CPU_CORTEX_A9 52 ldr r1, =CPU_MASK 54 ldr r1, =CPU_CORTEX_A9 67 ldr r1, [r0, #L2X0_R_PHY_BASE] 72 ldr r2, [r1, #L2X0_CTRL] 76 ldr r1, [r0, #L2X0_R_TAG_LATENCY] 77 ldr r2, [r0, #L2X0_R_DATA_LATENCY] 78 ldr r3, [r0, #L2X0_R_PREFETCH_CTRL] 85 ldr r1, [r0, #L2X0_R_PWR_CTRL] [all …]
|
/kernel/liteos_m/arch/arm/cortex-m4/gcc/ |
D | los_dispatch.S | 68 ldr r4, =OS_NVIC_SYSPRI2 69 ldr r5, =OS_NVIC_PENDSV_PRI 75 ldr r1, =g_losTask 76 ldr r0, [r1, #4] 77 ldr r12, [r0] 79 ldr.w r1, =OS_FPU_CPACR 80 ldr r1, [r1] 144 ldr r0, =OS_NVIC_INT_CTRL 145 ldr r1, =OS_NVIC_PENDSVSET 178 ldr.w r3, =OS_FPU_CPACR [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-pxa/ |
D | standby.S | 22 ldr r0, =PSSR 26 ldr ip, [r3] 62 ldr r2, [r1] @ Dummy read PXA3_MDCNFG 69 ldr r0, [r1, #PXA3_DDR_HCAL] @ Clear (and wait for) HCEN 72 1: ldr r0, [r1, #PXA3_DDR_HCAL] 76 ldr r0, [r1, #PXA3_RCOMP] @ Initiate RCOMP 83 ldr r0, [r1, #PXA3_DMCIER] @ set DMIER[EDLP] 87 ldr r0, [r1, #PXA3_DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN 92 1: ldr r0, [r1, #PXA3_DMCISR] 96 ldr r0, [r1, #PXA3_MDCNFG] @ set PXA3_MDCNFG[DMCEN] [all …]
|
/kernel/linux/linux-5.10/arch/arm/crypto/ |
D | sha1-armv4-large.S | 74 ldr r8,.LK_00_19 93 ldr r9,[r1],#4 @ handles unaligned 118 ldr r9,[r1],#4 @ handles unaligned 143 ldr r9,[r1],#4 @ handles unaligned 168 ldr r9,[r1],#4 @ handles unaligned 193 ldr r9,[r1],#4 @ handles unaligned 221 ldr r9,[r1],#4 @ handles unaligned 234 ldr r9,[r14,#15*4] 235 ldr r10,[r14,#13*4] 236 ldr r11,[r14,#7*4] [all …]
|
/kernel/liteos_a/arch/arm/arm/src/startup/ |
D | reset_vector_mp.S | 70 ldr r1, =\param0 77 ldr r0, =\param0 79 ldr r2, =\param2 114 ldr r0, =__quickstart_args_start 145 ldr r0, [r11] 155 ldr r5, =SYS_MEM_BASE /* r5: base of physical address */ 160 ldr r7, =__exception_handlers /* r7: base of linked address (or vm address) */ 161 ldr r6, =__bss_start /* r6: end of linked address (or vm address) */ 166 ldr r7, [r4], #4 176 …ldr r4, =g_firstPageTable /* r4: physical address of translation table and clear… [all …]
|
/kernel/linux/linux-5.10/arch/arm/mach-prima2/ |
D | sleep.S | 21 ldr r0, =sirfsoc_memc_base 22 ldr r5, [r0] 24 ldr r0, =sirfsoc_pwrc_base 25 ldr r6, [r0] 27 ldr r0, =sirfsoc_rtciobrg_base 28 ldr r7, [r0] 42 ldr r2, [r5, #DENALI_CTL_22_OFF] 51 ldr r4, [r5, #DENALI_CTL_112_OFF] 60 ldr r3, [r7]
|
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/ |
D | sleep.S | 36 ldr r6, =MDREFR 37 ldr r4, [r6] 39 ldr r5, =PPCR 81 ldr r0, =MSC0 82 ldr r1, =MSC1 83 ldr r2, =MSC2 85 ldr r3, [r0] 89 ldr r4, [r1] 93 ldr r5, [r2] 97 ldr r7, [r6] [all …]
|