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Searched refs:MPU_RASR_SRD_Pos (Results 1 – 7 of 7) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcore_sc000.h610 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
611 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
Dmpu_armv7.h107 … (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
Dcore_cm0plus.h596 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
597 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
Dcore_sc300.h1216 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
1217 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
Dcore_cm3.h1233 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
1234 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
Dcore_cm4.h1298 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
1299 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …
Dcore_cm7.h1525 #define MPU_RASR_SRD_Pos 8U /*!< MPU … macro
1526 #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU …