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Searched refs:a6xx (Results 1 – 25 of 56) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/freedreno/
Dmeson.build181 'a6xx/fd6_blend.c',
182 'a6xx/fd6_blend.h',
183 'a6xx/fd6_blitter.c',
184 'a6xx/fd6_blitter.h',
185 'a6xx/fd6_compute.c',
186 'a6xx/fd6_compute.h',
187 'a6xx/fd6_const.c',
188 'a6xx/fd6_const.h',
189 'a6xx/fd6_context.c',
190 'a6xx/fd6_context.h',
[all …]
/third_party/mesa3d/src/freedreno/ir3/
Dir3_compiler.c219 compiler->tess_use_shared = dev_info->a6xx.tess_use_shared; in ir3_compiler_create()
221 compiler->storage_16bit = dev_info->a6xx.storage_16bit; in ir3_compiler_create()
223 compiler->has_getfiberid = dev_info->a6xx.has_getfiberid; in ir3_compiler_create()
225 compiler->has_dp2acc = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
226 compiler->has_dp4acc = dev_info->a6xx.has_dp4acc; in ir3_compiler_create()
244 compiler->reg_size_vec4 = dev_info->a6xx.reg_size_vec4; in ir3_compiler_create()
297 compiler->nir_options.has_udot_4x8 = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
298 compiler->nir_options.has_sudot_4x8 = dev_info->a6xx.has_dp2acc; in ir3_compiler_create()
/third_party/mesa3d/src/freedreno/common/
Dfreedreno_devices.py126 self.a6xx = Struct()
127 self.a6xx.magic = Struct()
130 setattr(self.a6xx.magic, name, val)
133 self.a6xx.magic.RB_UNKNOWN_8E04_blit = RB_UNKNOWN_8E04_blit
134 self.a6xx.magic.PC_POWER_CNTL = PC_POWER_CNTL
138 self.a6xx.has_cp_reg_write = True
139 self.a6xx.has_8bpp_ubwc = True
144 setattr(self.a6xx, name, val)
Dfreedreno_dev_info.h153 } a6xx; member
/third_party/mesa3d/src/freedreno/registers/adreno/
Dmeson.build26 'a6xx.xml',
58 'a6xx-pack.xml.h',
59 input: [gen_header_py, 'a6xx.xml'],
60 output: 'a6xx-pack.xml.h',
/third_party/mesa3d/src/freedreno/vulkan/
Dtu_lrz.c155 if (cmd->device->physical_device->info->a6xx.lrz_track_quirk) { in tu6_write_lrz_reg()
199 cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking; in tu_lrz_init_state()
236 cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking; in tu_lrz_init_secondary()
307 if (cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking && in tu_lrz_begin_renderpass()
468 if (cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking) { in tu_lrz_sysmem_begin()
502 if (!cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking) in tu_disable_lrz()
521 !cmd->device->physical_device->info->a6xx.has_lrz_dir_tracking) in tu_lrz_clear_depth_image()
Dtu_nir_lower_multiview.c84 if (!dev->physical_device->info->a6xx.supports_multiview_mask) in tu_nir_lower_multiview()
94 dev->physical_device->info->a6xx.supports_multiview_mask ? 16 : 10; in tu_nir_lower_multiview()
Dtu_image.c291 if (!info->a6xx.has_8bpp_ubwc && in ubwc_possible()
335 if (!info->a6xx.has_z24uint_s8uint && samples > VK_SAMPLE_COUNT_1_BIT) in ubwc_possible()
561 device->physical_device->info->a6xx.enable_lrz_fast_clear && in tu_image_init()
564 if (has_lrz_fc || device->physical_device->info->a6xx.has_lrz_dir_tracking) { in tu_image_init()
568 if (device->physical_device->info->a6xx.has_lrz_dir_tracking) { in tu_image_init()
Dtu_device.c120 .KHR_16bit_storage = device->info->a6xx.storage_16bit, in get_device_extensions()
179 .EXT_sample_locations = device->info->a6xx.has_sample_locations, in get_device_extensions()
191 .EXT_filter_cubic = device->info->a6xx.has_tex_filter_cubic, in get_device_extensions()
224 .IMG_filter_cubic = device->info->a6xx.has_tex_filter_cubic, in get_device_extensions()
548 features->storageBuffer16BitAccess = pdevice->info->a6xx.storage_16bit; in tu_get_physical_device_features_1_1()
931 if (pdevice->info->a6xx.has_getfiberid) { in tu_get_physical_device_properties_1_1()
1065 pdevice->info->a6xx.has_dp2acc; in tu_get_physical_device_properties_1_3()
1069 pdevice->info->a6xx.has_dp2acc; in tu_get_physical_device_properties_1_3()
1083 pdevice->info->a6xx.has_dp2acc; in tu_get_physical_device_properties_1_3()
1087 pdevice->info->a6xx.has_dp2acc; in tu_get_physical_device_properties_1_3()
[all …]
/third_party/mesa3d/docs/relnotes/
D20.2.0.rst131 - freedreno/a6xx: incorrect rendering in asphalt 9
145 - freedreno/a6xx: skai/skqp fails
192 - freedreno/a6xx: broken rendering in playcanvas "after the flood"
208 - freedreno/a6xx: gpu hangs in google earth
222 - freedreno: minetest: alpha channel issue on a6xx
271 - freedreno/a6xx: pubg rendering glitches
1020 - ir3: Unconditionally enable MERGEDREGS on a6xx
1139 - freedreno/a6xx: Document dual-src blending enable bits
1174 - freedreno/a6xx: use firstIndex field
1181 - freedreno/a6xx: Force gl_Layer to 0 when necessary
[all …]
D19.1.0.rst1290 - freedreno/a6xx: Silence compiler warnings
1760 - freedreno/a6xx: UBWC support
1762 - freedreno/a6xx: Enable UBWC modifier
3415 - freedreno/a6xx: Emit blitter dst with OUT_RELOCW
3416 - freedreno/a6xx: Use tiling for all resources
3417 - freedreno/a6xx: regen headers
3418 - freedreno/a6xx: Drop render condition check in blitter
3420 - freedreno/a6xx: Use the right resource for separate stencil stride
3421 - freedreno/a6xx: Combine emit_blit and fd6_blit
3424 - freedreno/a6xx: Move blit check so as to restore comment
[all …]
D20.2.4.rst51 - freedreno/a6xx: Fix typo in height alignment calculation in a6xx layout
D20.0.0.rst701 - a6xx: Add more CP packets
1045 - freedreno/a6xx: Log the tiling mode in resource layout debug.
1065 - freedreno: Move a6xx's setup_slices() to a shareable helper function.
1099 - freedreno: Add some missing a6xx address declarations.
1814 - freedreno/registers: add a6xx texture format for stencil sampler
1995 - freedreno/a6xx: Fix primitive counters again
1996 - freedreno/a6xx: Clear sysmem with CP_BLIT
1998 - freedreno/a6xx: Fix layered texture type enum
2000 - freedreno/a6xx: Add register offset for STG/LDG
2016 - freedreno/a6xx: Build the right draw command for tessellation
[all …]
D20.3.2.rst64 - freedreno/a6xx: Fix assert which checks the count of shader outputs
84 - freedreno/a6xx: Flush depth at the end of bypass rendering, too.
D21.3.0.rst886 - tu, freedreno/a6xx, ir3: Rewrite tess PrimID handling
887 - tu, freedreno/a6xx: Fix setting PC_XS_OUT_CNTL::PRIMITVE_ID
890 - freedreno/a6xx: Add new register fields
893 - freedreno/a6xx: Document GRAS_SC_CNTL::SINGLE_PRIM_MODE
931 - freedreno/a6xx: Fix VS primid with tess + GS.
935 - freedreno/a6xx: Name TPL1_DBG_ECO_CNTL
1056 - ir3/a6xx,freedreno: account for resinfo return size dependency on IBO_0_FMT
1078 - tu: fix rast state allocation size on a6xx gen4
1327 - freedreno/a6xx: Apply the cube image size lowering to GL, too.
1330 - freedreno/ir3: Move a6xx's get_ssbo_size shl to NIR.
[all …]
/third_party/mesa3d/docs/
Dfeatures.txt88 Geometry shaders DONE (freedreno/a6xx)
102 …GL_ARB_blend_func_extended DONE (freedreno/a3xx, freedreno/a6xx, panfro…
132 …GL_ARB_sample_shading DONE (freedreno/a6xx, i965/gen6+, nv50, panf…
134 GL_ARB_tessellation_shader DONE (freedreno/a6xx, i965/gen7+, )
218 …GL_ARB_cull_distance DONE (freedreno/a6xx, i965, nv50, softpipe, …
274 GL_KHR_blend_equation_advanced DONE (freedreno/a6xx, i965, nvc0, panfrost)
281 …GL_OES_geometry_shader DONE (freedreno/a6xx, i965/hsw+, nvc0, r600,…
282 …GL_OES_gpu_shader5 DONE (freedreno/a6xx, all drivers that suppo…
284 …GL_OES_sample_shading DONE (freedreno/a6xx, i965, nvc0, r600, panf…
285 …GL_OES_sample_variables DONE (freedreno/a6xx, i965, nvc0, r600, panf…
[all …]
/third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_image.c72 ctx->screen->info->a6xx.storage_16bit ? PIPE_FORMAT_R16_UINT in fd6_ssbo_descriptor()
124 ctx->screen->info->a6xx.has_z24uint_s8uint); in fd6_emit_image_descriptor()
Dfd6_compute.c77 if (ctx->screen->info->a6xx.has_lpac) { in cs_program_emit()
96 if (ctx->screen->info->a6xx.has_lpac) { in cs_program_emit()
Dfd6_resource.c52 return info->a6xx.has_z24uint_s8uint; in ok_ubwc_format()
91 return info->a6xx.has_8bpp_ubwc; in ok_ubwc_format()
Dfd6_program.c105 uint32_t fibers_per_sp = ctx->screen->info->a6xx.fibers_per_sp; in fd6_emit_shader()
146 MIN2(so->instrlen, ctx->screen->info->a6xx.instr_cache_size); in fd6_emit_shader()
166 if (ctx->screen->info->a6xx.tess_use_shared) in setup_stream_out_disable()
178 if (ctx->screen->info->a6xx.tess_use_shared) { in setup_stream_out_disable()
243 if (ctx->screen->info->a6xx.tess_use_shared) in setup_stream_out()
279 if (ctx->screen->info->a6xx.tess_use_shared) { in setup_stream_out()
720 if (ctx->screen->info->a6xx.tess_use_shared) { in setup_stateobj()
Dfd6_gmem.c333 batch->ctx->screen->info->a6xx.has_z24uint_s8uint); in patch_fb_read_sysmem()
381 if (screen->info->a6xx.has_cp_reg_write) { in update_render_cntl()
711 OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); in emit_binning_pass()
714 OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); in emit_binning_pass()
764 .concurrent_resolve = screen->info->a6xx.concurrent_resolve)); in emit_binning_pass()
832 .concurrent_resolve = screen->info->a6xx.concurrent_resolve)); in fd6_emit_tile_init()
867 OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); in fd6_emit_tile_init()
870 OUT_RING(ring, screen->info->a6xx.magic.PC_POWER_CNTL); in fd6_emit_tile_init()
Dfd6_rasterizer.c96 if (ctx->screen->info->a6xx.has_shading_rate) { in __fd6_setup_rasterizer_stateobj()
Dfd6_blitter.c416 OUT_RING(ring, ctx->screen->info->a6xx.magic.RB_UNKNOWN_8E04_blit); in emit_blit_buffer()
511 OUT_RING(ring, batch->ctx->screen->info->a6xx.magic.RB_UNKNOWN_8E04_blit); in fd6_clear_ubwc()
689 OUT_RING(ring, ctx->screen->info->a6xx.magic.RB_UNKNOWN_8E04_blit); in emit_blit_texture()
817 OUT_RING(ring, ctx->screen->info->a6xx.magic.RB_UNKNOWN_8E04_blit); in fd6_clear_surface()
1072 if (!ctx->screen->info->a6xx.has_z24uint_s8uint) { in handle_zs_blit()
/third_party/mesa3d/src/freedreno/computerator/
Da6xx.c162 if (a6xx_backend->info->a6xx.has_lpac) { in cs_program_emit()
181 if (a6xx_backend->info->a6xx.has_lpac) { in cs_program_emit()
201 MIN2(v->instrlen, a6xx_backend->info->a6xx.instr_cache_size); in cs_program_emit()
213 ALIGN(per_fiber_size * a6xx_backend->info->a6xx.fibers_per_sp, 1 << 12); in cs_program_emit()
Dmeson.build23 'a6xx.c',

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