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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/misc/
Dqcom,fastrpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 The FastRPC implements an IPC (Inter-Processor Communication)
25 - adsp
26 - mdsp
27 - sdsp
28 - cdsp
30 memory-region:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/
Dqcom,fastrpc.txt3 The FastRPC implements an IPC (Inter-Processor Communication)
9 - compatible:
14 - label
20 - #address-cells
25 - #size-cells
30 = COMPUTE BANKS
31 Each subnode of the Fastrpc represents compute context banks available
33 - All Compute context banks MUST contain the following properties:
35 - compatible:
38 Definition: must be "qcom,fastrpc-compute-cb"
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/kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/
Dmetafmt-vsp1-hgo.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgo:
9 Renesas R-Car VSP1 1-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D
20 computes the minimum, maximum and sum of all pixels as well as per-channel
23 The HGO can compute histograms independently per channel, on the maximum of the
28 - In *64 bins normal mode*, the HGO operates on the three channels independently
29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
32 channels to compute a single 64-bins histogram. Only the RGB image format is
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/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dpixfmt-meta-vsp1-hgo.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgo:
9 Renesas R-Car VSP1 1-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1 1-D
20 computes the minimum, maximum and sum of all pixels as well as per-channel
23 The HGO can compute histograms independently per channel, on the maximum of the
28 - In *64 bins normal mode*, the HGO operates on the three channels independently
29 to compute three 64-bins histograms. RGB, YCbCr and HSV image formats are
31 - In *64 bins maximum mode*, the HGO operates on the maximum of the (R, G, B)
32 channels to compute a single 64-bins histogram. Only the RGB image format is
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,sm8350.h>
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Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
13 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
14 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
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Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
12 #include <dt-bindings/interconnect/qcom,osm-l3.h>
13 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/mailbox/qcom-ipcc.h>
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Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
11 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
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Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
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Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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/kernel/linux/linux-6.6/include/net/
Dgso.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 /* Keeps track of mac header offset relative to skb->head.
10 * For non-tunnel skb it points to skb_mac_header() and for
24 #define SKB_GSO_CB(skb) ((struct skb_gso_cb *)((skb)->cb + SKB_GSO_CB_OFFSET))
28 return (skb_mac_header(inner_skb) - inner_skb->head) - in skb_tnl_header_len()
29 SKB_GSO_CB(inner_skb)->mac_offset; in skb_tnl_header_len()
43 SKB_GSO_CB(skb)->mac_offset += (new_headroom - headroom); in gso_pskb_expand_head()
50 if (skb->remcsum_offload) in gso_reset_checksum()
53 SKB_GSO_CB(skb)->csum = res; in gso_reset_checksum()
54 SKB_GSO_CB(skb)->csum_start = skb_checksum_start(skb) - skb->head; in gso_reset_checksum()
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Dudp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
34 * struct udp_skb_cb - UDP(-Lite) private variables
37 * @cscov: checksum coverage length (UDP-Lite only)
50 #define UDP_SKB_CB(__skb) ((struct udp_skb_cb *)((__skb)->cb))
53 * struct udp_hslot - UDP hash slot
66 * struct udp_table - UDP table
84 return &table->hash[udp_hashfn(net, num, table->mask)]; in udp_hashslot()
93 return &table->hash2[hash & table->mask]; in udp_hashslot2()
109 * Generic checksumming routines for UDP(-Lite) v4 and v6
113 return (UDP_SKB_CB(skb)->cscov == skb->len ? in __udp_lib_checksum_complete()
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vm.c29 #include <linux/dma-fence-array.h>
32 #include <linux/dma-buf.h>
68 * Each GPUVM is represented by a 1-2 or 1-5 level page table, depending
89 #define START(node) ((node)->start)
90 #define LAST(node) ((node)->last)
99 * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback
109 * @cb: callback
111 struct dma_fence_cb cb; member
115 * struct amdgpu_vm_tlb_seq_struct - Helper to increment the TLB flush sequence
124 * @cb: callback
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/kernel/linux/linux-6.6/drivers/nfc/
Dnfcsim.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define NFCSIM_ERR(d, fmt, args...) nfc_err(&d->nfc_digital_dev->nfc_dev->dev, \
19 #define NFCSIM_DBG(d, fmt, args...) dev_dbg(&d->nfc_digital_dev->nfc_dev->dev, \
46 nfc_digital_cmd_complete_t cb; member
73 mutex_init(&link->lock); in nfcsim_link_new()
74 init_waitqueue_head(&link->recv_wait); in nfcsim_link_new()
81 dev_kfree_skb(link->skb); in nfcsim_link_free()
87 link->cond = 1; in nfcsim_link_recv_wake()
88 wake_up_interruptible(&link->recv_wait); in nfcsim_link_recv_wake()
94 mutex_lock(&link->lock); in nfcsim_link_set_skb()
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/kernel/linux/linux-5.10/drivers/nfc/
Dnfcsim.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #define NFCSIM_ERR(d, fmt, args...) nfc_err(&d->nfc_digital_dev->nfc_dev->dev, \
19 #define NFCSIM_DBG(d, fmt, args...) dev_dbg(&d->nfc_digital_dev->nfc_dev->dev, \
46 nfc_digital_cmd_complete_t cb; member
73 mutex_init(&link->lock); in nfcsim_link_new()
74 init_waitqueue_head(&link->recv_wait); in nfcsim_link_new()
81 dev_kfree_skb(link->skb); in nfcsim_link_free()
87 link->cond = 1; in nfcsim_link_recv_wake()
88 wake_up_interruptible(&link->recv_wait); in nfcsim_link_recv_wake()
94 mutex_lock(&link->lock); in nfcsim_link_set_skb()
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/kernel/linux/linux-5.10/kernel/power/
Denergy_model.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2018-2020, Arm ltd.
27 return (dev->bus == &cpu_subsys); in _is_cpu_device()
38 snprintf(name, sizeof(name), "ps:%lu", ps->frequency); in em_debug_create_ps()
40 /* Create per-ps directory */ in em_debug_create_ps()
42 debugfs_create_ulong("frequency", 0444, d, &ps->frequency); in em_debug_create_ps()
43 debugfs_create_ulong("power", 0444, d, &ps->power); in em_debug_create_ps()
44 debugfs_create_ulong("cost", 0444, d, &ps->cost); in em_debug_create_ps()
49 seq_printf(s, "%*pbl\n", cpumask_pr_args(to_cpumask(s->private))); in em_debug_cpus_show()
64 debugfs_create_file("cpus", 0444, d, dev->em_pd->cpus, in em_debug_create_pd()
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/kernel/linux/linux-6.6/kernel/power/
Denergy_model.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2018-2021, Arm ltd.
28 return (dev->bus == &cpu_subsys); in _is_cpu_device()
39 snprintf(name, sizeof(name), "ps:%lu", ps->frequency); in em_debug_create_ps()
41 /* Create per-ps directory */ in em_debug_create_ps()
43 debugfs_create_ulong("frequency", 0444, d, &ps->frequency); in em_debug_create_ps()
44 debugfs_create_ulong("power", 0444, d, &ps->power); in em_debug_create_ps()
45 debugfs_create_ulong("cost", 0444, d, &ps->cost); in em_debug_create_ps()
46 debugfs_create_ulong("inefficient", 0444, d, &ps->flags); in em_debug_create_ps()
51 seq_printf(s, "%*pbl\n", cpumask_pr_args(to_cpumask(s->private))); in em_debug_cpus_show()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dpp.c33 /* Compute the maximum number of lines that we can fit in the line buffer */
43 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
44 scl_data->viewport.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
45 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl32_calc_lb_num_partitions()
46 scl_data->viewport_c.width : scl_data->recout.width; in dscl32_calc_lb_num_partitions()
67 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
68 scl_data->viewport.height == scl_data->v_active) { in dscl32_calc_lb_num_partitions()
69 /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */ in dscl32_calc_lb_num_partitions()
75 /* 420 mode: luma using all 3 mem from Y, plus 3rd mem from Cr and Cb */ in dscl32_calc_lb_num_partitions()
81 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
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/kernel/linux/linux-5.10/include/net/
Dudp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
33 * struct udp_skb_cb - UDP(-Lite) private variables
36 * @cscov: checksum coverage length (UDP-Lite only)
49 #define UDP_SKB_CB(__skb) ((struct udp_skb_cb *)((__skb)->cb))
52 * struct udp_hslot - UDP hash slot
65 * struct udp_table - UDP table
83 return &table->hash[udp_hashfn(net, num, table->mask)]; in udp_hashslot()
92 return &table->hash2[hash & table->mask]; in udp_hashslot2()
107 * Generic checksumming routines for UDP(-Lite) v4 and v6
111 return (UDP_SKB_CB(skb)->cscov == skb->len ? in __udp_lib_checksum_complete()
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/kernel/linux/linux-6.6/drivers/accel/habanalabs/common/
Dhabanalabs.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2022 HabanaLabs, Ltd.
19 #include <linux/dma-direction.h>
28 #include <linux/io-64-nonatomic-lo-hi.h>
30 #include <linux/dma-buf.h>
42 * bits[63:59] - Encode mmap type
43 * bits[45:0] - mmap offset value
48 #define HL_MMAP_TYPE_SHIFT (59 - PAGE_SHIFT)
107 * enum hl_mmu_page_table_location - mmu page table location
108 * @MMU_DR_PGT: page-table is located on device DRAM.
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vm.c28 #include <linux/dma-fence-array.h>
31 #include <linux/dma-buf.h>
62 #define START(node) ((node)->start)
63 #define LAST(node) ((node)->last)
72 * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback
82 * @cb: callback
84 struct dma_fence_cb cb; member
88 * vm eviction_lock can be taken in MMU notifiers. Make sure no reclaim-FS
90 * an MMU notifier runs in reclaim-FS context.
94 mutex_lock(&vm->eviction_lock); in amdgpu_vm_eviction_lock()
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