| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_reg.c | 31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_reg.c | 31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-bcm-kona.c | 67 void __iomem *reg_base; member
83 static inline void bcm_kona_gpio_write_lock_regs(void __iomem *reg_base, in bcm_kona_gpio_write_lock_regs() argument
86 writel(BCM_GPIO_PASSWD, reg_base + GPIO_GPPWR_OFFSET); in bcm_kona_gpio_write_lock_regs()
87 writel(lockcode, reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_write_lock_regs()
99 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_lock_gpio()
101 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); in bcm_kona_gpio_lock_gpio()
115 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_unlock_gpio()
117 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); in bcm_kona_gpio_unlock_gpio()
125 void __iomem *reg_base = kona_gpio->reg_base; in bcm_kona_gpio_get_dir() local
128 val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK; in bcm_kona_gpio_get_dir()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-bcm-kona.c | 61 void __iomem *reg_base; member
92 static inline void bcm_kona_gpio_write_lock_regs(void __iomem *reg_base, in bcm_kona_gpio_write_lock_regs() argument
95 writel(BCM_GPIO_PASSWD, reg_base + GPIO_GPPWR_OFFSET); in bcm_kona_gpio_write_lock_regs()
96 writel(lockcode, reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_write_lock_regs()
117 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_lock_gpio()
119 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); in bcm_kona_gpio_lock_gpio()
137 val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); in bcm_kona_gpio_unlock_gpio()
139 bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); in bcm_kona_gpio_unlock_gpio()
150 void __iomem *reg_base = kona_gpio->reg_base; in bcm_kona_gpio_get_dir() local
153 val = readl(reg_base + GPIO_CONTROL(gpio)) & GPIO_GPCTR0_IOTR_MASK; in bcm_kona_gpio_get_dir()
[all …]
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| /kernel/linux/linux-6.6/drivers/spi/ |
| D | spi-gxp.c | 43 void __iomem *reg_base; member
53 void __iomem *reg_base = spifi->reg_base; in gxp_spi_set_mode() local
55 value = readb(reg_base + OFFSET_SPIMCTRL); in gxp_spi_set_mode()
58 writeb(0x55, reg_base + OFFSET_SPICMD); in gxp_spi_set_mode()
59 writeb(0xaa, reg_base + OFFSET_SPICMD); in gxp_spi_set_mode()
64 writeb(value, reg_base + OFFSET_SPIMCTRL); in gxp_spi_set_mode()
71 void __iomem *reg_base = spifi->reg_base; in gxp_spi_read_reg() local
74 value = readl(reg_base + OFFSET_SPIMCFG); in gxp_spi_read_reg()
79 writel(value, reg_base + OFFSET_SPIMCFG); in gxp_spi_read_reg()
81 writel(0, reg_base + OFFSET_SPIADDR); in gxp_spi_read_reg()
[all …]
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| D | spi-fsl-spi.c | 93 struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; in fsl_spi_change_mode() local
94 __be32 __iomem *mode = ®_base->mode; in fsl_spi_change_mode()
238 struct fsl_spi_reg __iomem *reg_base = mspi->reg_base; in fsl_spi_cpu_bufs() local
243 mpc8xxx_spi_write_reg(®_base->mask, SPIM_NE); in fsl_spi_cpu_bufs()
247 mpc8xxx_spi_write_reg(®_base->transmit, word); in fsl_spi_cpu_bufs()
256 struct fsl_spi_reg __iomem *reg_base; in fsl_spi_bufs() local
261 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_bufs()
286 mpc8xxx_spi_write_reg(®_base->mask, 0); in fsl_spi_bufs()
372 struct fsl_spi_reg __iomem *reg_base; in fsl_spi_setup() local
390 reg_base = mpc8xxx_spi->reg_base; in fsl_spi_setup()
[all …]
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| /kernel/linux/linux-5.10/arch/sh/drivers/pci/ |
| D | pci-sh7780.c | 100 addr = __raw_readl(hose->reg_base + SH4_PCIALR); in sh7780_pci_err_irq()
105 status = __raw_readw(hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
113 __raw_writew(cmd, hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
119 status = __raw_readl(hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
127 __raw_writel(cmd, hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
132 status = __raw_readl(hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
140 __raw_writel(cmd, hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
154 __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM); in sh7780_pci_serr_irq()
169 __raw_writel(0, hose->reg_base + SH4_PCIAINT); in sh7780_pci_setup_irqs()
177 PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS); in sh7780_pci_setup_irqs()
[all …]
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| /kernel/linux/linux-6.6/arch/sh/drivers/pci/ |
| D | pci-sh7780.c | 100 addr = __raw_readl(hose->reg_base + SH4_PCIALR); in sh7780_pci_err_irq()
105 status = __raw_readw(hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
113 __raw_writew(cmd, hose->reg_base + PCI_STATUS); in sh7780_pci_err_irq()
119 status = __raw_readl(hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
127 __raw_writel(cmd, hose->reg_base + SH4_PCIAINT); in sh7780_pci_err_irq()
132 status = __raw_readl(hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
140 __raw_writel(cmd, hose->reg_base + SH4_PCIINT); in sh7780_pci_err_irq()
154 __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM); in sh7780_pci_serr_irq()
169 __raw_writel(0, hose->reg_base + SH4_PCIAINT); in sh7780_pci_setup_irqs()
177 PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS); in sh7780_pci_setup_irqs()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/cavium/thunder/ |
| D | thunder_xcv.c | 47 void __iomem *reg_base; member
70 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
75 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
84 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
87 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
92 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
94 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
95 readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/cavium/thunder/ |
| D | thunder_xcv.c | 47 void __iomem *reg_base; member
70 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
75 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
84 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
87 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
92 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
94 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
95 readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
[all …]
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| /kernel/linux/linux-5.10/drivers/irqchip/ |
| D | irq-csky-apb-intc.c | 34 static void __iomem *reg_base; variable
60 static void __init ck_set_gc(struct device_node *node, void __iomem *reg_base, in ck_set_gc() argument
66 gc->reg_base = reg_base; in ck_set_gc()
111 reg_base = of_iomap(node, 0); in ck_intc_init_comm()
112 if (!reg_base) { in ck_intc_init_comm()
153 readl(reg_base + GX_INTC_PEN63_32), 32); in gx_irq_handler()
158 readl(reg_base + GX_INTC_PEN31_00), 0); in gx_irq_handler()
175 writel(0x0, reg_base + GX_INTC_NEN31_00); in gx_intc_init()
176 writel(0x0, reg_base + GX_INTC_NEN63_32); in gx_intc_init()
181 writel(0x0, reg_base + GX_INTC_NMASK31_00); in gx_intc_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/irqchip/ |
| D | irq-csky-apb-intc.c | 34 static void __iomem *reg_base; variable
60 static void __init ck_set_gc(struct device_node *node, void __iomem *reg_base, in ck_set_gc() argument
66 gc->reg_base = reg_base; in ck_set_gc()
111 reg_base = of_iomap(node, 0); in ck_intc_init_comm()
112 if (!reg_base) { in ck_intc_init_comm()
153 readl(reg_base + GX_INTC_PEN63_32), 32); in gx_irq_handler()
158 readl(reg_base + GX_INTC_PEN31_00), 0); in gx_irq_handler()
175 writel(0x0, reg_base + GX_INTC_NEN31_00); in gx_intc_init()
176 writel(0x0, reg_base + GX_INTC_NEN63_32); in gx_intc_init()
181 writel(0x0, reg_base + GX_INTC_NMASK31_00); in gx_intc_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/misc/mchp_pci1xxxx/ |
| D | mchp_pci1xxxx_gpio.c | 39 void __iomem *reg_base; member
52 data = readl(priv->reg_base + INP_EN_OFFSET(nr)); in pci1xxxx_gpio_get_direction()
56 data = readl(priv->reg_base + OUT_EN_OFFSET(nr)); in pci1xxxx_gpio_get_direction()
83 pci1xxx_assign_bit(priv->reg_base, INP_EN_OFFSET(nr), (nr % 32), true); in pci1xxxx_gpio_direction_input()
84 pci1xxx_assign_bit(priv->reg_base, OUT_EN_OFFSET(nr), (nr % 32), false); in pci1xxxx_gpio_direction_input()
94 return (readl(priv->reg_base + INP_OFFSET(nr)) >> (nr % 32)) & 1; in pci1xxxx_gpio_get()
105 pci1xxx_assign_bit(priv->reg_base, INP_EN_OFFSET(nr), (nr % 32), false); in pci1xxxx_gpio_direction_output()
106 pci1xxx_assign_bit(priv->reg_base, OUT_EN_OFFSET(nr), (nr % 32), true); in pci1xxxx_gpio_direction_output()
107 data = readl(priv->reg_base + OUT_OFFSET(nr)); in pci1xxxx_gpio_direction_output()
112 writel(data, priv->reg_base + OUT_OFFSET(nr)); in pci1xxxx_gpio_direction_output()
[all …]
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| /kernel/linux/linux-6.6/drivers/remoteproc/ |
| D | qcom_q6v5_wcss.c | 110 void __iomem *reg_base; member
161 val = readl(wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
163 writel(val, wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
166 val = readl(wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
168 writel(val, wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
171 ret = readl_poll_timeout(wcss->reg_base + Q6SS_XO_CBCR, in q6v5_wcss_reset()
180 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
182 writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
187 writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
190 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
[all …]
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| D | mtk_scp.c | 163 val = readl(scp->reg_base + MT8183_SW_RSTN); in mt8183_scp_reset_assert()
165 writel(val, scp->reg_base + MT8183_SW_RSTN); in mt8183_scp_reset_assert()
172 val = readl(scp->reg_base + MT8183_SW_RSTN); in mt8183_scp_reset_deassert()
174 writel(val, scp->reg_base + MT8183_SW_RSTN); in mt8183_scp_reset_deassert()
179 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); in mt8192_scp_reset_assert()
184 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); in mt8192_scp_reset_deassert()
191 scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST); in mt8183_scp_irq_handler()
199 scp->reg_base + MT8183_SCP_TO_HOST); in mt8183_scp_irq_handler()
206 scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); in mt8192_scp_irq_handler()
216 scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); in mt8192_scp_irq_handler()
[all …]
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| /kernel/linux/linux-5.10/drivers/ata/ |
| D | ahci_qoriq.c | 63 struct ccsr_ahci *reg_base; member
173 void __iomem *reg_base = hpriv->mmio; in ahci_qoriq_phy_init() local
181 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
182 writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
183 writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
184 writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4); in ahci_qoriq_phy_init()
185 writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5); in ahci_qoriq_phy_init()
186 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
189 reg_base + LS1021A_AXICC_ADDR); in ahci_qoriq_phy_init()
199 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
[all …]
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| /kernel/linux/linux-6.6/drivers/ata/ |
| D | ahci_qoriq.c | 61 struct ccsr_ahci *reg_base; member
167 void __iomem *reg_base = hpriv->mmio; in ahci_qoriq_phy_init() local
175 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
176 writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
177 writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
178 writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4); in ahci_qoriq_phy_init()
179 writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5); in ahci_qoriq_phy_init()
180 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
183 reg_base + LS1021A_AXICC_ADDR); in ahci_qoriq_phy_init()
193 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | qcom_q6v5_wcss.c | 77 void __iomem *reg_base; member
107 val = readl(wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
109 writel(val, wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
112 val = readl(wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
114 writel(val, wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
117 ret = readl_poll_timeout(wcss->reg_base + Q6SS_XO_CBCR, in q6v5_wcss_reset()
126 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
128 writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
133 writel(val, wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
136 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/can/ |
| D | kvaser_pciefd.c | 264 void __iomem *reg_base; member
277 void __iomem *reg_base; member
338 ret = readl_poll_timeout(pcie->reg_base + KVASER_PCIEFD_SPI_STATUS_REG, in kvaser_pciefd_spi_wait_loop()
349 iowrite32(BIT(0), pcie->reg_base + KVASER_PCIEFD_SPI_SSEL_REG); in kvaser_pciefd_spi_cmd()
350 iowrite32(BIT(10), pcie->reg_base + KVASER_PCIEFD_SPI_CTRL_REG); in kvaser_pciefd_spi_cmd()
351 ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
358 iowrite32(*tx++, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); in kvaser_pciefd_spi_cmd()
363 ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
371 iowrite32(0, pcie->reg_base + KVASER_PCIEFD_SPI_TX_REG); in kvaser_pciefd_spi_cmd()
376 *rx++ = ioread32(pcie->reg_base + KVASER_PCIEFD_SPI_RX_REG); in kvaser_pciefd_spi_cmd()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | ptp.c | 129 ptp_clock_hi = readq(ptp->reg_base + PTP_CLOCK_HI); in ptp_reset_thresh()
133 writeq(500000000, ptp->reg_base + PTP_PPS_THRESH_HI); in ptp_reset_thresh()
158 sec = readq(ptp->reg_base + PTP_CLOCK_SEC) & 0xFFFFFFFFUL; in read_ptp_tstmp_sec_nsec()
159 nsec = readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_sec_nsec()
160 sec1 = readq(ptp->reg_base + PTP_CLOCK_SEC) & 0xFFFFFFFFUL; in read_ptp_tstmp_sec_nsec()
163 nsec = readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_sec_nsec()
173 return readq(ptp->reg_base + PTP_CLOCK_HI); in read_ptp_tstmp_nsec()
257 writeq(timestamp, ptp->reg_base + PTP_NANO_TIMESTAMP); in ptp_atomic_update()
258 writeq(0, ptp->reg_base + PTP_FRNS_TIMESTAMP); in ptp_atomic_update()
260 ptp->reg_base + PTP_SEC_TIMESTAMP); in ptp_atomic_update()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/zte/ |
| D | clk.c | 47 hw_cfg0 = readl_relaxed(zx_pll->reg_base); in hw_to_idx()
48 hw_cfg1 = readl_relaxed(zx_pll->reg_base + CFG0_CFG1_OFFSET); in hw_to_idx()
100 writel_relaxed(config->cfg0, zx_pll->reg_base); in zx_pll_set_rate()
101 writel_relaxed(config->cfg1, zx_pll->reg_base + CFG0_CFG1_OFFSET); in zx_pll_set_rate()
115 reg = readl_relaxed(zx_pll->reg_base); in zx_pll_enable()
116 writel_relaxed(reg & ~BIT(zx_pll->pd_bit), zx_pll->reg_base); in zx_pll_enable()
118 return readl_relaxed_poll_timeout(zx_pll->reg_base, reg, in zx_pll_enable()
130 reg = readl_relaxed(zx_pll->reg_base); in zx_pll_disable()
131 writel_relaxed(reg | BIT(zx_pll->pd_bit), zx_pll->reg_base); in zx_pll_disable()
139 reg = readl_relaxed(zx_pll->reg_base); in zx_pll_is_enabled()
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| /kernel/linux/linux-5.10/drivers/video/fbdev/mmp/hw/ |
| D | mmp_spi.c | 34 void __iomem *reg_base = (void __iomem *) in lcd_spi_write() local
38 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR); in lcd_spi_write()
42 writel_relaxed((u8)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
45 writel_relaxed((u16)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
48 writel_relaxed((u32)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
55 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
58 writel(tmp, reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
60 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
63 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
71 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
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| /kernel/linux/linux-6.6/drivers/video/fbdev/mmp/hw/ |
| D | mmp_spi.c | 34 void __iomem *reg_base = (void __iomem *) in lcd_spi_write() local
38 writel_relaxed(~SPI_IRQ_MASK, reg_base + SPU_IRQ_ISR); in lcd_spi_write()
42 writel_relaxed((u8)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
45 writel_relaxed((u16)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
48 writel_relaxed((u32)data, reg_base + LCD_SPU_SPI_TXDATA); in lcd_spi_write()
55 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
58 writel(tmp, reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
60 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
63 isr = readl_relaxed(reg_base + SPU_IRQ_ISR); in lcd_spi_write()
71 tmp = readl_relaxed(reg_base + LCD_SPU_SPI_CTRL); in lcd_spi_write()
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-zynqmp.c | 46 void __iomem *reg_base; member
69 writel(xrtcdev->calibval, (xrtcdev->reg_base + RTC_CALIB_WR)); in xlnx_rtc_set_time()
71 writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR); in xlnx_rtc_set_time()
81 writel(RTC_INT_SEC, xrtcdev->reg_base + RTC_INT_STS); in xlnx_rtc_set_time()
92 status = readl(xrtcdev->reg_base + RTC_INT_STS); in xlnx_rtc_read_time()
99 read_time = readl(xrtcdev->reg_base + RTC_CUR_TM); in xlnx_rtc_read_time()
108 read_time = readl(xrtcdev->reg_base + RTC_SET_TM_RD) - 1; in xlnx_rtc_read_time()
119 rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_ALRM), &alrm->time); in xlnx_rtc_read_alarm()
120 alrm->enabled = readl(xrtcdev->reg_base + RTC_INT_MASK) & RTC_INT_ALRM; in xlnx_rtc_read_alarm()
135 status = readl(xrtcdev->reg_base + RTC_INT_STS); in xlnx_rtc_alarm_irq_enable()
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| /kernel/linux/linux-5.10/drivers/ide/ |
| D | opti621.c | 30 static int reg_base; variable
35 * is at reg_base (0x1f0 primary, 0x170 secondary,
41 inw(reg_base + 1); in write_reg()
42 inw(reg_base + 1); in write_reg()
43 outb(3, reg_base + 2); in write_reg()
44 outb(value, reg_base + reg); in write_reg()
45 outb(0x83, reg_base + 2); in write_reg()
49 * is at reg_base (0x1f0 primary, 0x170 secondary,
57 inw(reg_base + 1); in read_reg()
58 inw(reg_base + 1); in read_reg()
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