| /kernel/linux/linux-5.10/arch/parisc/kernel/ |
| D | perf_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
46 sync ; follow ERS
91 ;* arg0 : rdr to be read
98 ;* arg0 : rdr to be read
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
[all …]
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| /kernel/linux/linux-6.6/arch/parisc/kernel/ |
| D | perf_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
46 sync ; follow ERS
91 ;* arg0 : rdr to be read
98 ;* arg0 : rdr to be read
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/pi433/Documentation/ |
| D | pi433.txt | 13 until something gets received terminates the read request.
50 as described for the transmission cycle the read out of the hardware fifo is done
52 read. So also for reception it is possible to receive more data than the hardware
60 the calls open, ioctl, read, write and close.
64 ----------------
67 PI433_IOC_RD_TX_CFG - get the transmission parameters from the driver
68 PI433_IOC_WR_TX_CFG - set the transmission parameters
69 PI433_IOC_RD_RX_CFG - get the receiving parameters from the driver
70 PI433_IOC_WR_RX_CFG - set the receiving parameters
86 FSK - frequency shift key
[all …]
|
| /kernel/linux/linux-6.6/drivers/staging/pi433/Documentation/ |
| D | pi433.txt | 13 until something gets received terminates the read request.
50 as described for the transmission cycle the read out of the hardware fifo is done
52 read. So also for reception it is possible to receive more data than the hardware
60 the calls open, ioctl, read, write and close.
64 ----------------
67 PI433_IOC_RD_TX_CFG - get the transmission parameters from the driver
68 PI433_IOC_WR_TX_CFG - set the transmission parameters
69 PI433_IOC_RD_RX_CFG - get the receiving parameters from the driver
70 PI433_IOC_WR_RX_CFG - set the receiving parameters
86 FSK - frequency shift key
[all …]
|
| /kernel/linux/linux-6.6/Documentation/sound/cards/ |
| D | hdspm.rst | 2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
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|
| /kernel/linux/linux-5.10/Documentation/sound/cards/ |
| D | hdspm.rst | 2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/hamradio/ |
| D | z8530.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
57 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
72 #define SYNC_ENAB 0 /* Sync Modes Enable */
77 #define MONSYNC 0 /* 8 Bit Sync character */
78 #define BISYNC 0x10 /* 16 bit sync character */
79 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
80 #define EXTSYNC 0x30 /* External Sync Mode */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
[all …]
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| /kernel/linux/linux-5.10/drivers/net/hamradio/ |
| D | z8530.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
57 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
72 #define SYNC_ENAB 0 /* Sync Modes Enable */
77 #define MONSYNC 0 /* 8 Bit Sync character */
78 #define BISYNC 0x10 /* 16 bit sync character */
79 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
80 #define EXTSYNC 0x30 /* External Sync Mode */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
[all …]
|
| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
|
| D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
112 #define BISYNC 0x10 /* 16 bit sync character */
113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
114 #define EXTSYNC 0x30 /* External Sync Mode */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
|
| D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
124 #define SYNC_ENAB 0 /* Sync Modes Enable */
130 #define MONSYNC 0 /* 8 Bit Sync character */
131 #define BISYNC 0x10 /* 16 bit sync character */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC 0x30 /* External Sync Mode */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
|
| D | pmac_zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
74 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
76 return uap->mate; in pmz_get_port_A()
88 writeb(reg, port->control_reg); in read_zsreg()
89 return readb(port->control_reg); in read_zsreg()
95 writeb(reg, port->control_reg); in write_zsreg()
96 writeb(value, port->control_reg); in write_zsreg()
101 return readb(port->data_reg); in read_zsdata()
106 writeb(data, port->data_reg); in write_zsdata()
[all …]
|
| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
104 #define BISYNC 0x10 /* 16 bit sync character */
105 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
106 #define EXTSYNC 0x30 /* External Sync Mode */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
128 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
|
| D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
112 #define BISYNC 0x10 /* 16 bit sync character */
113 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
114 #define EXTSYNC 0x30 /* External Sync Mode */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
|
| D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
124 #define SYNC_ENAB 0 /* Sync Modes Enable */
130 #define MONSYNC 0 /* 8 Bit Sync character */
131 #define BISYNC 0x10 /* 16 bit sync character */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
133 #define EXTSYNC 0x30 /* External Sync Mode */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
[all …]
|
| D | pmac_zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
[all …]
|
| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | dma-buf.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
26 * struct dma_buf_sync - Synchronize with CPU access.
29 * possible to guarantee coherency between the CPU-visible map and underlying
35 * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
37 * DMA_BUF_SYNC_END and the same read/write flags.
45 * follow-up work is not submitted to GPU or other device driver until
65 * Indicates that the mapped DMA buffer will be read by the
89 * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
92 * current set of fences on a dma-buf file descriptor as a sync_file. CPU
93 * waits via poll() or other driver-specific mechanisms typically wait on
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/cgroup-v1/ |
| D | blkio-controller.rst | 21 -----------------------------
22 - Enable Block IO controller::
26 - Enable throttling in block layer::
30 - Mount blkio controller (see cgroups.txt, Why are cgroups needed?)::
32 mount -t cgroup -o blkio none /sys/fs/cgroup/blkio
34 - Specify a bandwidth rate on particular device for root group. The format
42 - Run dd to read a file and see if rate is throttled to 1MB/s or not::
83 - Block IO controller.
86 - Debug help. Right now some additional stats file show up in cgroup
90 - Enable block device throttling support in block layer.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/cgroup-v1/ |
| D | blkio-controller.rst | 22 -----------------------------
33 mount -t cgroup -o blkio none /sys/fs/cgroup/blkio
43 Run dd to read a file and see if rate is throttled to 1MB/s or not::
98 --------------------------------
106 see Documentation/block/bfq-iosched.rst.
110 weight. For more details, see Documentation/block/bfq-iosched.rst.
152 are further divided by the type of operation - read or write, sync
159 are further divided by the type of operation - read or write, sync
173 the type of operation - read or write, sync or async. First two fields
186 (there might be a time lag here due to re-ordering of requests by the
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wan/ |
| D | z85230.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
78 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
93 #define SYNC_ENAB 0 /* Sync Modes Enable */
98 #define MONSYNC 0 /* 8 Bit Sync character */
99 #define BISYNC 0x10 /* 16 bit sync character */
100 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
101 #define EXTSYNC 0x30 /* External Sync Mode */
112 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
121 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
[all …]
|
| /kernel/linux/linux-5.10/Documentation/driver-api/memory-devices/ |
| D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
65 2. sync common
74 3. read async muxed
85 4. read async non-muxed
96 5. read sync muxed
107 6. read sync non-muxed
131 8. write async non-muxed
144 9. write sync muxed
157 10. write sync non-muxed
|
| /kernel/linux/linux-6.6/Documentation/driver-api/memory-devices/ |
| D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
65 2. sync common
74 3. read async muxed
85 4. read async non-muxed
96 5. read sync muxed
107 6. read sync non-muxed
131 8. write async non-muxed
144 9. write sync muxed
157 10. write sync non-muxed
|
| /kernel/linux/linux-5.10/drivers/power/supply/ |
| D | da9150-fg.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
61 /* QIF Sync Timeout */
96 /* Set QIF code (READ mode) */ in da9150_fg_read_attr()
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
124 /* Trigger QIF Sync to update QIF readable data */
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
132 /* Check if QIF sync already requested, and write to sync if not */ in da9150_fg_read_sync_start()
139 /* Wait for sync to complete */ in da9150_fg_read_sync_start()
[all …]
|
| /kernel/linux/linux-6.6/drivers/power/supply/ |
| D | da9150-fg.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
22 #include <linux/devm-helpers.h>
61 /* QIF Sync Timeout */
96 /* Set QIF code (READ mode) */ in da9150_fg_read_attr()
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
124 /* Trigger QIF Sync to update QIF readable data */
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
132 /* Check if QIF sync already requested, and write to sync if not */ in da9150_fg_read_sync_start()
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/platforms/powermac/ |
| D | cache.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * This file contains low-level cache management functions
5 * (In fact the only thing that is Apple-specific is that we assume
6 * that we can read from ROM at physical address 0xfff00000.)
15 #include <asm/feature-fixups.h>
45 sync
52 sync
58 sync
60 sync
62 /* Disp-flush L1. We have a weird problem here that I never
[all …]
|