/external/swiftshader/third_party/LLVM/lib/Analysis/ |
D | ValueTracking.cpp | 159 APInt Mask2(Mask & ~KnownZero); in ComputeMaskedBits() local 173 APInt Mask2(Mask & ~KnownOne); in ComputeMaskedBits() local 200 APInt Mask2 = APInt::getAllOnesValue(BitWidth); in ComputeMaskedBits() local 330 APInt Mask2(Mask.lshr(ShiftAmt)); in ComputeMaskedBits() local 347 APInt Mask2(Mask.shl(ShiftAmt)); in ComputeMaskedBits() local 365 APInt Mask2(Mask.shl(ShiftAmt)); in ComputeMaskedBits() local 410 APInt Mask2 = APInt::getLowBitsSet(BitWidth, in ComputeMaskedBits() local 472 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in ComputeMaskedBits() local 500 APInt Mask2 = APInt::getSignBit(BitWidth); in ComputeMaskedBits() local 515 APInt Mask2 = LowBits & Mask; in ComputeMaskedBits() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsExpandPseudo.cpp | 107 unsigned Mask2 = I->getOperand(4).getReg(); in expandAtomicCmpSwapSubword() local 382 unsigned Mask2 = I->getOperand(4).getReg(); in expandAtomicBinOpSubword() local
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D | MipsISelLowering.cpp | 1572 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local 1784 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
D | InstCombineSimplifyDemanded.cpp | 694 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local 720 APInt Mask2 = APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineSimplifyDemanded.cpp | 685 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in SimplifyDemandedUseBits() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineSimplifyDemanded.cpp | 592 APInt Mask2 = LowBits | APInt::getSignMask(BitWidth); in SimplifyDemandedUseBits() local
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 966 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword() local 1187 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in EmitAtomicCmpSwapPartword() local
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/external/llvm/lib/Transforms/Vectorize/ |
D | BBVectorize.cpp | 2854 std::vector<Constant *> Mask1(numElemI), Mask2(numElemI); in replaceOutputsOfPair() local 2869 std::vector<Constant *> Mask1(numElemJ), Mask2(numElemJ); in replaceOutputsOfPair() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 1668 APInt Mask2 = APInt::getAllOnesValue(BitWidth); in ComputeMaskedBits() local 1986 APInt Mask2 = APInt::getLowBitsSet(BitWidth, in ComputeMaskedBits() local 2015 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); in ComputeMaskedBits() local 2044 APInt Mask2 = LowBits & Mask; in ComputeMaskedBits() local
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 1248 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local 1503 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3148 SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); in LowerFCOPYSIGN() local 6824 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local 6897 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4306 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local 9400 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombine() local 9570 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4979 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local 10927 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombineToBFI() local 11201 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 6056 SmallVector<int, 8> Mask2(4U, -1); in LowerVECTOR_SHUFFLE_128v4() local 8129 SDValue Mask2 = DAG.getLoad(VT, dl, DAG.getEntryNode(), CPIdx, in LowerFCOPYSIGN() local
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