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Searched defs:TEST_MSG (Results 1 – 25 of 135) sorted by relevance

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/external/arm-neon-tests/
Dref_vtbX.c133 #define TEST_MSG "VTBL1" in exec_vtbX() macro
140 #define TEST_MSG "VTBL2" in exec_vtbX() macro
147 #define TEST_MSG "VTBL3" in exec_vtbX() macro
154 #define TEST_MSG "VTBL4" in exec_vtbX() macro
203 #define TEST_MSG "VTBX1" in exec_vtbX() macro
210 #define TEST_MSG "VTBX2" in exec_vtbX() macro
217 #define TEST_MSG "VTBX3" in exec_vtbX() macro
224 #define TEST_MSG "VTBX4" in exec_vtbX() macro
Dref_vrev.c58 #define TEST_MSG "VREV16" in exec_vrev() macro
68 #define TEST_MSG "VREV32" in exec_vrev() macro
84 #define TEST_MSG "VREV64" in exec_vrev() macro
Dref_vcvt.c35 #define TEST_MSG "VCVT/VCVTQ" macro
166 #define TEST_MSG "VCVT_N/VCVTQ_N" in exec_vcvt() macro
188 #define TEST_MSG "VCVT/VCVTQ" in exec_vcvt() macro
200 #define TEST_MSG "VCVT_N/VCVTQ_N" in exec_vcvt() macro
210 #define TEST_MSG "VCVT_N/VCVTQ_N" in exec_vcvt() macro
219 #define TEST_MSG "VCVT FP16" in exec_vcvt() macro
Dref_vldX_dup.c131 #define TEST_MSG "VLD2_DUP/VLD2Q_DUP" in exec_vldX_dup() macro
146 #define TEST_MSG "VLD3_DUP/VLD3Q_DUP" in exec_vldX_dup() macro
166 #define TEST_MSG "VLD4_DUP/VLD4Q_DUP" in exec_vldX_dup() macro
Dref_vldX.c162 #define TEST_MSG "VLD2/VLD2Q" in exec_vldX() macro
178 #define TEST_MSG "VLD3/VLD3Q" in exec_vldX() macro
199 #define TEST_MSG "VLD4/VLD4Q" in exec_vldX() macro
Dref_vdup.c34 #define TEST_MSG "VDUP/VDUPQ" macro
86 #define TEST_MSG "VMOV/VMOVQ" in exec_vdup() macro
Dref_vstX_lane.c184 #define TEST_MSG "VST2_LANE/VST2Q_LANE" in exec_vstX_lane() macro
200 #define TEST_MSG "VST3_LANE/VST3Q_LANE" in exec_vstX_lane() macro
221 #define TEST_MSG "VST4_LANE/VST4Q_LANE" in exec_vstX_lane() macro
Dref_vldX_lane.c187 #define TEST_MSG "VLD2_LANE/VLD2Q_LANE" in exec_vldX_lane() macro
202 #define TEST_MSG "VLD3_LANE/VLD3Q_LANE" in exec_vldX_lane() macro
222 #define TEST_MSG "VLD4_LANE/VLD4Q_LANE" in exec_vldX_lane() macro
Dref_vcle.c27 #define TEST_MSG "VCLE/VCLEQ" macro
Dref_vorr.c27 #define TEST_MSG "VORR/VORRQ" macro
Dref_vbic.c27 #define TEST_MSG "VBIC/VBICQ" macro
Dref_vqdmlsl_n.c27 #define TEST_MSG "VQDMLSL_N" macro
Dref_vcge.c27 #define TEST_MSG "VCGE/VCGEQ" macro
Dref_vcgt.c27 #define TEST_MSG "VCGT/VCGTQ" macro
Dref_vmlsl_lane.c27 #define TEST_MSG "VMLSL_LANE" macro
Dref_vmls_n.c27 #define TEST_MSG "VMLS_N" macro
Dref_vrsubhn.c27 #define TEST_MSG "VRSUBHN" macro
Dref_vqdmlsl.c27 #define TEST_MSG "VQDMLSL" macro
Dref_vclt.c27 #define TEST_MSG "VCLT/VCLTQ" macro
Dref_vpmax.c27 #define TEST_MSG "VPMAX" macro
Dref_vcalt.c27 #define TEST_MSG "VCALT/VCALTQ" macro
Dref_vcagt.c27 #define TEST_MSG "VCAGT/VCAGTQ" macro
Dref_vmlsl.c27 #define TEST_MSG "VMLSL" macro
Dref_vcale.c27 #define TEST_MSG "VCALE/VCALEQ" macro
Dref_vsubl.c27 #define TEST_MSG "VSUBL" macro

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