| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/AcpiTables/ |
| D | Madt.c | 64 #define PARKED_ADDRESS(Base, ClusterId, CoreId) \ argument
65 ((Base) + (CORES_PER_CLUSTER * ClusterId + CoreId) * PARKED_OFFSET)
69 #define AMD_GIC(CpuNum, ClusterId, CoreId, PerfInt) { \ argument
74 (ClusterId << 8) | CoreId, /* UINT32 AcpiProcessorUid */ \
84 (ClusterId << 8) | CoreId /* UINT64 MPIDR */ \
197 UINT32 CoreId, in BuildGicC() argument
204 MpId = (UINT32) GET_MPID (ClusterId, CoreId); in BuildGicC()
216 GicC->ParkedAddress = PARKED_ADDRESS(MpParkingBase, ClusterId, CoreId); in BuildGicC()
314 CpuNum, ArmCoreInfoTable[CpuNum].ClusterId, ArmCoreInfoTable[CpuNum].CoreId)); in MadtHeader()
318 ArmCoreInfoTable[CpuNum].CoreId, in MadtHeader()
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/PrePi/ |
| D | MainMPCore.c | 54 UINT32 CoreId; in SecondaryMain() local
61 CoreId = GET_CORE_ID(MpId); in SecondaryMain()
73 … ((ArmCoreInfoTable[Index].ClusterId == ClusterId) && (ArmCoreInfoTable[Index].CoreId == CoreId)) { in SecondaryMain()
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/PrePeiCore/ |
| D | MainMPCore.c | 45 UINT32 CoreId; in SecondaryMain() local
52 CoreId = GET_CORE_ID(MpId); in SecondaryMain()
74 … ((ArmCoreInfoTable[Index].ClusterId == ClusterId) && (ArmCoreInfoTable[Index].CoreId == CoreId)) { in SecondaryMain()
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitPei/ |
| D | PlatInitPei.c | 184 mAmdMpCoreInfoTable[Index].CoreId = CpuResetInfo.CoreStatus.CoreId; in PlatInitPeiEntryPoint()
188 mAmdMpCoreInfoTable[Index].CoreId)); in PlatInitPeiEntryPoint()
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Binary/AmdModulePkg/Common/ |
| D | CoreState.h | 61 UINT32 CoreId; ///< CPU Core ID member
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1616/D05AcpiTables/ |
| D | MadtHi1616.aslc | 32 #define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
33 #define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
34 #define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
35 #define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
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| /device/linaro/bootloader/edk2/ArmPkg/Include/Guid/ |
| D | ArmMpCoreInfo.h | 24 UINT32 CoreId; member
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| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| D | Pal.h | 294 UINT64 CoreId: 16; ///< The core identifier of the logical processor member
1015 UINT64 CoreId:16; ///< The core identifier of the logical processor member
1696 UINT64 CoreId:4; ///< Bit3:0, Processor core ID (default is 0 for member
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| /device/linaro/bootloader/edk2/ArmPkg/Include/Library/ |
| D | ArmLib.h | 102 #define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId)) argument
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/ |
| D | MadtHi1610.aslc | 32 #define PLATFORM_GET_MPID(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Pv660AcpiTables/ |
| D | Madt.aslc | 30 #define PLATFORM_GET_MPID(ClusterId, CoreId) (0x20000 | ((ClusterId) << 8) | (CoreId))
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/FdtDxe/ |
| D | BdsLinuxFdt.c | 576 ArmCoreInfoTable[Index].CoreId); in AmdStyxPrepareFdt()
661 ArmCoreInfoTable[Index].CoreId); in AmdStyxPrepareFdt()
669 (ArmCoreInfoTable[Index].CoreId != PrimaryCoreId))) { in AmdStyxPrepareFdt()
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/AMD/Styx/Drivers/PlatInitDxe/ |
| D | PlatInitDxe.c | 223 MpId = GET_MPID (ArmCoreInfo->ClusterId, ArmCoreInfo->CoreId); in AmdStyxParkSecondaryCore()
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| /device/linaro/bootloader/edk2/ArmPkg/ |
| D | ArmPkg.dec | 113 # Use ClusterId + CoreId to identify the PrimaryCore
115 # The Primary Core is ClusterId[0] & CoreId[0]
|