Searched refs:TEGRA_MISC_BASE (Results 1 – 7 of 7) sorted by relevance
60 mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_LOW, addr_low); in plat_secondary_setup()61 mmio_write_32(TEGRA_MISC_BASE + MISCREG_AA64_RST_HIGH, addr_high); in plat_secondary_setup()
56 MAP_REGION_FLAT(TEGRA_MISC_BASE, 0x10000, /* 64KB */
122 val = mmio_read_32(TEGRA_MISC_BASE + MISCREG_PFCFG); in tegra_soc_pwr_domain_suspend()
64 #define TEGRA_MISC_BASE U(0x70000000) macro
89 #define TEGRA_MISC_BASE U(0x70000000) macro
56 return mmio_read_32(TEGRA_MISC_BASE + HARDWARE_REVISION_OFFSET); in tegra_get_chipid()
71 #define TEGRA_MISC_BASE U(0x00100000) macro