| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelDAGToDAG.cpp | 195 case ISD::ADDE: { in trySelect()
199 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || in trySelect()
204 if (Opcode == ISD::ADDE) { in trySelect()
|
| D | MipsSEISelDAGToDAG.cpp | 245 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || in selectAddESubE()
739 case ISD::ADDE: { in trySelect()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelDAGToDAG.cpp | 210 case ISD::ADDE: { in Select()
213 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || in Select()
218 if (Opcode == ISD::ADDE) { in Select()
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Alpha/ |
| D | add128.ll | 1 ;test for ADDC and ADDE expansion
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/RISCV/ |
| D | addc-adde-sube-subc.ll | 5 ; Ensure that the ISDOpcodes ADDC, ADDE, SUBC, SUBE are handled correctly
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 123 case ISD::ADDE: in isdToLanaiAluCode()
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 123 case ISD::ADDE: in isdToLanaiAluCode()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 98 setOperationAction(ISD::ADDE, MVT::i32, Custom); in BlackfinTargetLowering()
429 unsigned Opcode = Op.getOpcode()==ISD::ADDE ? BF::ADD : BF::SUB; in LowerADDE()
471 case ISD::ADDE: in LowerOperation()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 217 ADDE, SUBE, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 223 ADDE, SUBE, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 232 ADDE, SUBE, enumerator
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativePPC_32.c | 129 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
|
| D | sljitNativePPC_64.c | 267 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.h | 75 ADDE, // Add using carry enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 274 assert(Opc == ISD::ADDE && "ISD::ADDE not in a chain of ADDE nodes!"); in selectAddE()
798 case ISD::ADDE: { in trySelect()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 72 ADDE, // Add using carry enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 227 case ISD::ADDE: return "adde"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 99 ADDE, // Add using carry enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 478 case ISD::ADDE: in Select()
700 bool ConsumeCarry = (Opcode == ISD::ADDE || Opcode == ISD::SUBE); in SelectADD_SUB_I64()
703 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 91 setOperationAction(ISD::ADDE, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 268 case ISD::ADDE: return "adde"; in getOperationName()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 99 ISD::SRA_PARTS, ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, in WebAssemblyTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1594 setOperationAction(ISD::ADDE, MVT::i32, Custom); in SparcTargetLowering()
1600 setOperationAction(ISD::ADDE, MVT::i64, Custom); in SparcTargetLowering()
2963 case ISD::ADDC: hiOpc = ISD::ADDE; break; in LowerADDC_ADDE_SUBC_SUBE()
2964 case ISD::ADDE: hasChain = true; break; in LowerADDC_ADDE_SUBC_SUBE()
3112 case ISD::ADDE: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | ReleaseNotes.rst | 287 * ``ADDC``/``ADDE``/``SUBC``/``SUBE`` are now deprecated and will default to expand. Backends
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 1145 case ISD::ADDE: in ExpandIntegerResult()
1284 Hi = DAG.getNode(ISD::ADDE, DL, VTList, HiOps, 3); in ExpandShiftByConstant()
1527 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3); in ExpandIntRes_ADDSUB()
1576 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps, 3); in ExpandIntRes_ADDSUBC()
|