| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | buildpairf64-extractelementf64-implicit-sp.ll | 18 ; FPXX-IMPLICIT-SP: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}, implicit $sp
22 ; NO-IMPLICIT-SP: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}
23 ; NO-IMPLICIT-SP-NOT: BuildPairF64 %{{[0-9]+}}, %{{[0-9]+}}, implicit $sp
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| D | shrink-wrap-buildpairf64-extractelementf64.mir | 37 # CHECK-NEXT: BuildPairF64
40 $d0 = BuildPairF64 $zero, $zero
70 $d0 = BuildPairF64 $zero, $zero, implicit $sp
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| D | 2013-11-18-fp64-const0.ll | 9 ; of BuildPairF64 instead of BuildPairF64_64.
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| /external/llvm/test/CodeGen/Mips/ |
| D | 2013-11-18-fp64-const0.ll | 9 ; of BuildPairF64 instead of BuildPairF64_64.
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsExpandPseudo.cpp | 70 case Mips::BuildPairF64: in runOnMachineBasicBlock()
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| D | MipsISelLowering.h | 79 BuildPairF64, enumerator
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| D | MipsISelDAGToDAG.cpp | 306 return CurDAG->getMachineNode(Mips::BuildPairF64, dl, MVT::f64, Zero, in Select()
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| D | MipsInstrFPU.td | 45 def MipsBuildPairF64 : SDNode<"MipsISD::BuildPairF64", SDT_MipsBuildPairF64>;
337 def BuildPairF64 :
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| D | MipsISelLowering.cpp | 72 case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64"; in getTargetNodeName()
1654 return DAG.getNode(MipsISD::BuildPairF64, dl, MVT::f64, Word0, Word1); in LowerFCOPYSIGN64()
2322 ArgValue = DAG.getNode(MipsISD::BuildPairF64, dl, MVT::f64, in LowerFormalArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.h | 33 BuildPairF64, enumerator
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| D | RISCVISelLowering.cpp | 952 return DAG.getNode(RISCVISD::BuildPairF64, DL, MVT::f64, Lo, Hi); in unpackF64OnRV32DSoftABI()
1424 RetValue = DAG.getNode(RISCVISD::BuildPairF64, DL, MVT::f64, RetValue, in LowerCall()
1574 case RISCVISD::BuildPairF64: in getTargetNodeName()
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| D | RISCVInstrInfoD.td | 26 def RISCVBuildPairF64 : SDNode<"RISCVISD::BuildPairF64", SDT_RISCVBuildPairF64>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 99 BuildPairF64, enumerator
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| D | MipsInstrFPU.td | 48 def MipsBuildPairF64 : SDNode<"MipsISD::BuildPairF64", SDT_MipsBuildPairF64>;
559 def BuildPairF64 : BuildPairF64Base<AFGR64Opnd>, FGR_32, HARDFLOAT;
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| D | MipsSEISelDAGToDAG.cpp | 764 ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64, DL, in trySelect()
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| D | MipsSEInstrInfo.cpp | 383 case Mips::BuildPairF64: in expandPostRAPseudo()
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| D | MipsSEFrameLowering.cpp | 120 case Mips::BuildPairF64: in expandInstr()
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| D | MipsISelLowering.cpp | 140 case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64"; in getTargetNodeName()
2039 return DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, LowX, Res); in lowerFCOPYSIGN32()
3104 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 248 case Mips::BuildPairF64: in processFunctionAfterISel()
819 ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64, DL, in trySelect()
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| D | MipsISelLowering.h | 150 BuildPairF64, enumerator
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| D | MipsInstrFPU.td | 51 def MipsBuildPairF64 : SDNode<"MipsISD::BuildPairF64", SDT_MipsBuildPairF64>;
710 def BuildPairF64 : BuildPairF64Base<AFGR64Opnd>, FGR_32, HARDFLOAT;
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| D | MipsSEFrameLowering.cpp | 140 case Mips::BuildPairF64: in expandInstr()
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| D | MipsSEInstrInfo.cpp | 463 case Mips::BuildPairF64: in expandPostRAPseudo()
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| D | MipsScheduleP5600.td | 544 MTHC1_D64, BuildPairF64,
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| D | MipsISelLowering.cpp | 221 case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64"; in getTargetNodeName()
2232 return DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, LowX, Res); in lowerFCOPYSIGN32()
3398 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
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