| /external/u-boot/board/freescale/ls1043ardb/ |
| D | cpld.c | 38 CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1); in cpld_set_altbank()
40 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_altbank()
41 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_altbank()
44 CPLD_WRITE(vbank, reg7); in cpld_set_altbank()
46 CPLD_WRITE(system_rst, 1); in cpld_set_altbank()
59 CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1); in cpld_set_defbank()
61 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_defbank()
62 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_defbank()
64 CPLD_WRITE(vbank, 0); in cpld_set_defbank()
66 CPLD_WRITE(system_rst, 1); in cpld_set_defbank()
[all …]
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| D | cpld.h | 35 #define CPLD_WRITE(reg, value) \ macro
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| /external/u-boot/board/freescale/ls1046ardb/ |
| D | cpld.c | 38 CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1); in cpld_set_altbank()
40 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_altbank()
41 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_altbank()
44 CPLD_WRITE(vbank, reg7); in cpld_set_altbank()
46 CPLD_WRITE(system_rst, 1); in cpld_set_altbank()
59 CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1); in cpld_set_defbank()
61 CPLD_WRITE(cfg_rcw_src1, reg5); in cpld_set_defbank()
62 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_defbank()
64 CPLD_WRITE(vbank, 0); in cpld_set_defbank()
66 CPLD_WRITE(system_rst, 1); in cpld_set_defbank()
[all …]
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| D | cpld.h | 40 #define CPLD_WRITE(reg, value) \ macro
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| /external/u-boot/board/freescale/p2041rdb/ |
| D | cpld.c | 42 CPLD_WRITE(system_rst, 1); in __cpld_reset()
53 CPLD_WRITE(sw_ctl_on, reg5 | CPLD_SWITCH_BANK_ENABLE); in __cpld_set_altbank()
54 CPLD_WRITE(fbank_sel, 1); in __cpld_set_altbank()
55 CPLD_WRITE(system_rst, 1); in __cpld_set_altbank()
65 CPLD_WRITE(system_rst_default, 1); in __cpld_set_defbank()
129 CPLD_WRITE(serdes_mux, reg); in cpld_cmd()
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| D | cpld.h | 54 #define CPLD_WRITE(reg, value) cpld_write(offsetof(cpld_data_t, reg), value) macro
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| D | p2041rdb.c | 111 CPLD_WRITE(serdes_mux, mux); in board_config_lanes_mux()
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| /external/u-boot/board/freescale/t208xrdb/ |
| D | cpld.c | 32 CPLD_WRITE(flash_csr, reg); in cpld_set_altbank()
33 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET); in cpld_set_altbank()
42 CPLD_WRITE(flash_csr, reg); in cpld_set_defbank()
43 CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET); in cpld_set_defbank()
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| D | cpld.h | 30 #define CPLD_WRITE(reg, value) \ macro
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| D | t208xrdb.c | 108 CPLD_WRITE(reset_ctl, reg); in misc_init_r()
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| /external/u-boot/board/freescale/t102xrdb/ |
| D | cpld.c | 38 CPLD_WRITE(flash_csr, reg); in cpld_set_altbank()
39 CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); in cpld_set_altbank()
51 CPLD_WRITE(flash_csr, reg); in cpld_set_defbank()
52 CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); in cpld_set_defbank()
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| D | t102xrdb.c | 106 CPLD_WRITE(misc_ctl_status, reg & ~CPLD_PCIE_SGMII_MUX); in board_mux_lane()
109 CPLD_WRITE(misc_ctl_status, reg | CPLD_PCIE_SGMII_MUX); in board_mux_lane()
111 CPLD_WRITE(boot_override, CPLD_OVERRIDE_MUX_EN); in board_mux_lane()
172 CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); in board_reset()
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| D | cpld.h | 33 #define CPLD_WRITE(reg, value)\ macro
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| /external/u-boot/board/freescale/t104xrdb/ |
| D | cpld.c | 42 CPLD_WRITE(flash_ctl_status, reg); in cpld_set_altbank()
43 CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); in cpld_set_altbank()
55 CPLD_WRITE(flash_ctl_status, reg); in cpld_set_defbank()
56 CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET); in cpld_set_defbank()
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| D | t104xrdb.c | 99 CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | in misc_init_r()
104 CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | in misc_init_r()
109 CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | in misc_init_r()
119 CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL & in misc_init_r()
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| D | cpld.h | 42 #define CPLD_WRITE(reg, value)\ macro
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| D | diu.c | 72 CPLD_WRITE(sfp_ctl_status , sw & ~(CPLD_DIU_SEL_DFP)); in platform_diu_init()
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| /external/u-boot/board/freescale/t4rdb/ |
| D | cpld.c | 51 CPLD_WRITE(vbank, altbank); in cpld_set_altbank()
53 CPLD_WRITE(software_on, override | CPLD_BANK_SEL_EN); in cpld_set_altbank()
54 CPLD_WRITE(sys_reset, CPLD_SYSTEM_RESET); in cpld_set_altbank()
71 CPLD_WRITE(global_reset, val); in cpld_set_defbank()
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| D | cpld.h | 46 #define CPLD_WRITE(reg, value) \ macro
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