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Searched refs:CSD0_BASE_ADDR (Results 1 – 19 of 19) sorted by relevance

/external/u-boot/include/configs/
Dflea3.h95 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
98 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
Dwoodburn_common.h101 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
104 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
Dmx35pdk.h107 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
112 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
Dts4800.h124 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53evk.h111 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53smd.h103 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dusbarmory.h86 #define PHYS_SDRAM CSD0_BASE_ADDR
Dkp_imx53.h92 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53cx9020.h144 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx51evk.h171 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53ard.h158 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53loco.h154 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
Dmx53ppd.h183 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
/external/u-boot/arch/arm/cpu/arm1136/mx35/
Dmx35_sdram.c48 case CSD0_BASE_ADDR: in mx3_setup_sdram_bank()
/external/u-boot/board/CarMediaLab/flea3/
Dflea3.c60 mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG, in board_setup_sdram()
/external/u-boot/arch/arm/include/asm/arch-mx5/
Dimx-regs.h18 #define CSD0_BASE_ADDR 0x90000000 macro
28 #define CSD0_BASE_ADDR 0x70000000 macro
/external/u-boot/board/woodburn/
Dwoodburn.c53 mx3_setup_sdram_bank(CSD0_BASE_ADDR, ESDCTL_DDR2_CONFIG, in board_setup_sdram()
/external/u-boot/arch/arm/include/asm/arch-mx35/
Dimx-regs.h102 #define CSD0_BASE_ADDR 0x80000000 macro
/external/u-boot/board/freescale/mx35pdk/
Dlowlevel_init.S100 mov r1, #CSD0_BASE_ADDR