Searched refs:Div64 (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 64 class Div64<SDNode op, bits<6> func, string instr_asm, InstrItinClass itin>:
168 def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>;
169 def DUDIV : Div64<MipsDivRemU, 0x1f, "ddivu", IIIdiv>;
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| /external/v8/src/s390/ |
| D | macro-assembler-s390.h | 371 void Div64(Register dst, Register src1, const MemOperand& src2);
372 void Div64(Register dst, Register src1, Register src2);
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| D | macro-assembler-s390.cc | 2286 void TurboAssembler::Div64(Register dst, Register src1, in Div64() function in v8::internal::TurboAssembler
2291 void TurboAssembler::Div64(Register dst, Register src1, Register src2) { in Div64() function in v8::internal::TurboAssembler
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| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 1932 ASSEMBLE_BIN_OP(RRRInstr(Div64), RRM64Instr(Div64), nullInstr); in AssembleArchInstruction()
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