| /external/u-boot/board/freescale/mpc837xerdb/ |
| D | pci.c | 78 pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
81 pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; in pci_init_board()
100 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
103 out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/freescale/mpc832xemds/ |
| D | pci.c | 71 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
74 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
129 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
132 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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| D | mpc832xemds.c | 101 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /external/u-boot/board/freescale/mpc837xemds/ |
| D | pci.c | 96 pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
99 pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; in pci_init_board()
128 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
131 out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/freescale/mpc8349emds/ |
| D | pci.c | 135 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
138 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
159 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
162 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| D | mpc8349emds.c | 59 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /external/u-boot/board/freescale/mpc8315erdb/ |
| D | mpc8315erdb.c | 133 pci_law[0].bar = CONFIG_SYS_PCI_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
136 pci_law[1].bar = CONFIG_SYS_PCI_IO_PHYS & LAWBAR_BAR; in pci_init_board()
151 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
154 out_be32(&pcie_law[1].bar, CONFIG_SYS_PCIE2_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/sbc8349/ |
| D | pci.c | 59 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
62 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| D | sbc8349.c | 48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /external/u-boot/board/freescale/mpc8323erdb/ |
| D | mpc8323erdb.c | 82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
169 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
172 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /external/u-boot/board/tqc/tqm834x/ |
| D | pci.c | 87 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
90 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /external/u-boot/board/freescale/mpc8349itx/ |
| D | pci.c | 89 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
92 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| D | mpc8349itx.c | 132 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /external/u-boot/board/esd/vme8349/ |
| D | pci.c | 98 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
101 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| D | vme8349.c | 41 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
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| /external/u-boot/board/freescale/mpc8313erdb/ |
| D | mpc8313erdb.c | 88 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; in pci_init_board()
91 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; in pci_init_board()
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| /external/u-boot/board/ve8313/ |
| D | ve8313.c | 185 out_be32(&pci_law[0].bar, CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR); in pci_init_board()
188 out_be32(&pci_law[1].bar, CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/mpc8308_p1m/ |
| D | mpc8308_p1m.c | 55 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/freescale/mpc8308rdb/ |
| D | mpc8308rdb.c | 119 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/board/keymile/km83xx/ |
| D | km83xx.c | 341 CONFIG_SYS_DDR_BASE & LAWBAR_BAR); in dram_init()
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| /external/u-boot/board/gdsys/mpc8308/ |
| D | strider.c | 395 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
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| D | hrcon.c | 340 out_be32(&pcie_law[0].bar, CONFIG_SYS_PCIE1_BASE & LAWBAR_BAR); in pci_init_board()
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| /external/u-boot/include/ |
| D | mpc83xx.h | 50 #define LAWBAR_BAR 0xFFFFF000 /* Base addr. mask */ macro
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