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Searched refs:Op0 (Results 1 – 25 of 264) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenFastISel.inc18 unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i32_r(unsigned Op0, bool Op0IsKill) {
19 return FastEmitInst_r(X86::MOVZX32rr8, X86::GR32RegisterClass, Op0, Op0IsKill);
22 unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i64_r(unsigned Op0, bool Op0IsKill) {
23 return FastEmitInst_r(X86::MOVZX64rr8, X86::GR64RegisterClass, Op0, Op0IsKill);
26 unsigned FastEmit_ISD_ANY_EXTEND_MVT_i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
28 case MVT::i32: return FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i32_r(Op0, Op0IsKill);
29 case MVT::i64: return FastEmit_ISD_ANY_EXTEND_MVT_i8_MVT_i64_r(Op0, Op0IsKill);
34 unsigned FastEmit_ISD_ANY_EXTEND_MVT_i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
37 return FastEmitInst_r(X86::MOVZX64rr16, X86::GR64RegisterClass, Op0, Op0IsKill);
40 unsigned FastEmit_ISD_ANY_EXTEND_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenFastISel.inc121 unsigned fastEmit_AArch64ISD_CALL_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
124 return fastEmitInst_r(AArch64::BLR, &AArch64::GPR64RegClass, Op0, Op0IsKill);
127 unsigned fastEmit_AArch64ISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
129 case MVT::i64: return fastEmit_AArch64ISD_CALL_MVT_i64_r(RetVT, Op0, Op0IsKill);
136 unsigned fastEmit_AArch64ISD_CMEQz_MVT_v8i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
140 return fastEmitInst_r(AArch64::CMEQv8i8rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
145 unsigned fastEmit_AArch64ISD_CMEQz_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
149 return fastEmitInst_r(AArch64::CMEQv16i8rz, &AArch64::FPR128RegClass, Op0, Op0IsKill);
154 unsigned fastEmit_AArch64ISD_CMEQz_MVT_v4i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
158 return fastEmitInst_r(AArch64::CMEQv4i16rz, &AArch64::FPR64RegClass, Op0, Op0IsKill);
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc42 unsigned fastEmit_ISD_ABS_MVT_v16i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
46 return fastEmitInst_r(X86::VPABSBZ128rr, &X86::VR128XRegClass, Op0, Op0IsKill);
49 return fastEmitInst_r(X86::PABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
52 return fastEmitInst_r(X86::VPABSBrr, &X86::VR128RegClass, Op0, Op0IsKill);
57 unsigned fastEmit_ISD_ABS_MVT_v32i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
61 return fastEmitInst_r(X86::VPABSBZ256rr, &X86::VR256XRegClass, Op0, Op0IsKill);
64 return fastEmitInst_r(X86::VPABSBYrr, &X86::VR256RegClass, Op0, Op0IsKill);
69 unsigned fastEmit_ISD_ABS_MVT_v64i8_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
73 return fastEmitInst_r(X86::VPABSBZrr, &X86::VR512RegClass, Op0, Op0IsKill);
78 unsigned fastEmit_ISD_ABS_MVT_v8i16_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenFastISel.inc75 unsigned fastEmit_ARMISD_CALL_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
79 return fastEmitInst_r(ARM::BLX, &ARM::GPRRegClass, Op0, Op0IsKill);
84 unsigned fastEmit_ARMISD_CALL_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
86 case MVT::i32: return fastEmit_ARMISD_CALL_MVT_i32_r(RetVT, Op0, Op0IsKill);
93 unsigned fastEmit_ARMISD_CALL_NOLINK_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
97 return fastEmitInst_r(ARM::tBX_CALL, &ARM::tGPRRegClass, Op0, Op0IsKill);
100 return fastEmitInst_r(ARM::BMOVPCRX_CALL, &ARM::tGPRRegClass, Op0, Op0IsKill);
103 return fastEmitInst_r(ARM::BX_CALL, &ARM::tGPRRegClass, Op0, Op0IsKill);
108 unsigned fastEmit_ARMISD_CALL_NOLINK_r(MVT VT, MVT RetVT, unsigned Op0, bool Op0IsKill) {
110 case MVT::i32: return fastEmit_ARMISD_CALL_NOLINK_MVT_i32_r(RetVT, Op0, Op0IsKill);
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc67 unsigned fastEmit_ISD_BITCAST_MVT_i32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
71 return fastEmitInst_r(Mips::MTC1_MMR6, &Mips::FGR32RegClass, Op0, Op0IsKill);
74 return fastEmitInst_r(Mips::MTC1_MM, &Mips::FGR32RegClass, Op0, Op0IsKill);
77 return fastEmitInst_r(Mips::MTC1, &Mips::FGR32RegClass, Op0, Op0IsKill);
82 unsigned fastEmit_ISD_BITCAST_MVT_i64_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
86 return fastEmitInst_r(Mips::DMTC1, &Mips::FGR64RegClass, Op0, Op0IsKill);
91 unsigned fastEmit_ISD_BITCAST_MVT_f32_r(MVT RetVT, unsigned Op0, bool Op0IsKill) {
95 return fastEmitInst_r(Mips::MFC1_MMR6, &Mips::GPR32RegClass, Op0, Op0IsKill);
98 return fastEmitInst_r(Mips::MFC1_MM, &Mips::GPR32RegClass, Op0, Op0IsKill);
101 return fastEmitInst_r(Mips::MFC1, &Mips::GPR32RegClass, Op0, Op0IsKill);
[all …]
/external/swiftshader/third_party/LLVM/lib/Analysis/
DInstructionSimplify.cpp105 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) in ExpandBinOp() local
106 if (Op0->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
108 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in ExpandBinOp()
167 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in FactorizeBinOp() local
170 if (!Op0 || Op0->getOpcode() != OpcodeToExtract || in FactorizeBinOp()
175 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1); in FactorizeBinOp()
240 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in SimplifyAssociativeBinOp() local
244 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
245 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
246 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
DInstCombineMulDivRem.cpp101 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
103 if (Value *V = SimplifyMulInst(Op0, Op1, TD)) in visitMul()
110 return BinaryOperator::CreateNeg(Op0, I.getName()); in visitMul()
115 if (BinaryOperator *SI = dyn_cast<BinaryOperator>(Op0)) in visitMul()
123 Constant *NewCst = ConstantInt::get(Op0->getType(), Val.logBase2()); in visitMul()
124 BinaryOperator *Shl = BinaryOperator::CreateShl(Op0, NewCst); in visitMul()
132 if (Op0->hasOneUse() && in visitMul()
133 match(Op0, m_Add(m_Value(X), m_ConstantInt(C1)))) { in visitMul()
147 if (Op0->hasOneUse()) { in visitMul()
150 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) in visitMul()
[all …]
DInstCombineAndOrXor.cpp728 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in FoldAndOfICmps() local
731 return getICmpValue(isSigned, Code, Op0, Op1, Builder); in FoldAndOfICmps()
1035 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAnd() local
1037 if (Value *V = SimplifyAndInst(Op0, Op1, TD)) in visitAnd()
1053 if (BinaryOperator *Op0I = dyn_cast<BinaryOperator>(Op0)) { in visitAnd()
1132 if (match(Op0, m_Trunc(m_And(m_Value(X), m_ConstantInt(YC))))) { in visitAnd()
1145 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in visitAnd()
1148 if (isa<PHINode>(Op0)) in visitAnd()
1155 if (Value *Op0NotVal = dyn_castNotVal(Op0)) in visitAnd()
1157 if (Op0->hasOneUse() && Op1->hasOneUse()) { in visitAnd()
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DInstCombineShifts.cpp24 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
31 if (isa<Constant>(Op0)) in commonShiftTransforms()
37 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
311 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1, in FoldShiftByConstant() argument
319 CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) { in FoldShiftByConstant()
321 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n"); in FoldShiftByConstant()
324 GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this)); in FoldShiftByConstant()
330 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits(); in FoldShiftByConstant()
337 return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType())); in FoldShiftByConstant()
344 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0)) in FoldShiftByConstant()
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DInstCombineAddSub.cpp530 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSub() local
532 if (Value *V = SimplifySubInst(Op0, Op1, I.hasNoSignedWrap(), in visitSub()
542 BinaryOperator *Res = BinaryOperator::CreateAdd(Op0, V); in visitSub()
549 return BinaryOperator::CreateXor(Op0, Op1); in visitSub()
552 if (match(Op0, m_AllOnes())) in visitSub()
555 if (ConstantInt *C = dyn_cast<ConstantInt>(Op0)) { in visitSub()
595 if (match(Op1, m_Add(m_Specific(Op0), m_Value(Y))) || in visitSub()
596 match(Op1, m_Add(m_Value(Y), m_Specific(Op0)))) in visitSub()
600 if (match(Op0, m_Sub(m_Specific(Op1), m_Value(Y)))) in visitSub()
611 return BinaryOperator::CreateAdd(Op0, in visitSub()
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DInstCombineCompares.cpp1776 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitICmpInst() local
1781 if (getComplexity(Op0) < getComplexity(Op1)) { in visitICmpInst()
1783 std::swap(Op0, Op1); in visitICmpInst()
1787 if (Value *V = SimplifyICmpInst(I.getPredicate(), Op0, Op1, TD)) in visitICmpInst()
1790 Type *Ty = Op0->getType(); in visitICmpInst()
1797 Value *Xor = Builder->CreateXor(Op0, Op1, I.getName()+"tmp"); in visitICmpInst()
1801 return BinaryOperator::CreateXor(Op0, Op1); in visitICmpInst()
1804 std::swap(Op0, Op1); // Change icmp ugt -> icmp ult in visitICmpInst()
1807 Value *Not = Builder->CreateNot(Op0, I.getName()+"tmp"); in visitICmpInst()
1811 std::swap(Op0, Op1); // Change icmp sgt -> icmp slt in visitICmpInst()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/
DInstructionSimplify.cpp175 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) in ExpandBinOp() local
176 if (Op0->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
178 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in ExpandBinOp()
235 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in SimplifyAssociativeBinOp() local
239 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
240 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
241 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
281 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
282 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
283 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/
DInstCombineMulDivRem.cpp143 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
145 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName()); in visitMul()
199 if (Op0->hasOneUse()) { in visitMul()
202 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) in visitMul()
204 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1)))) in visitMul()
223 if (match(Op0, m_OneUse(m_Add(m_Value(X), m_Constant(C1))))) { in visitMul()
235 if (match(Op0, m_Neg(m_Value(X))) && match(Op1, m_Constant(Op1C))) in visitMul()
239 if (match(Op0, m_Neg(m_Value(X))) && match(Op1, m_Neg(m_Value(Y)))) { in visitMul()
242 cast<OverflowingBinaryOperator>(Op0)->hasNoSignedWrap() && in visitMul()
252 BinaryOperator *Div = dyn_cast<BinaryOperator>(Op0); in visitMul()
[all …]
DInstCombineShifts.cpp25 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
26 assert(Op0->getType() == Op1->getType()); in commonShiftTransforms()
33 if (isa<Constant>(Op0)) in commonShiftTransforms()
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
46 if (match(Op0, m_Constant()) && match(Op1, m_Add(m_Value(A), m_Constant(C)))) in commonShiftTransforms()
50 I.getOpcode(), Builder.CreateBinOp(I.getOpcode(), Op0, C), A); in commonShiftTransforms()
347 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1, in FoldShiftByConstant() argument
358 canEvaluateShifted(Op0, Op1C->getZExtValue(), isLeftShift, *this, &I)) { in FoldShiftByConstant()
362 << *Op0 << "\n SH: " << I << "\n"); in FoldShiftByConstant()
365 I, getShiftedValue(Op0, Op1C->getZExtValue(), isLeftShift, *this, DL)); in FoldShiftByConstant()
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DInstCombineAndOrXor.cpp918 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in foldAndOfICmps() local
921 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder); in foldAndOfICmps()
1219 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldCastedBitwiseLogic() local
1220 CastInst *Cast0 = dyn_cast<CastInst>(Op0); in foldCastedBitwiseLogic()
1284 Value *Op0 = I.getOperand(0); in foldAndToXor() local
1299 if (Op0->hasOneUse() || Op1->hasOneUse()) in foldAndToXor()
1310 Value *Op0 = I.getOperand(0); in foldOrToXor() local
1317 if (Op0->hasOneUse() || Op1->hasOneUse()) in foldOrToXor()
1318 if (match(Op0, m_And(m_Value(A), m_Value(B))) && in foldOrToXor()
1326 if (match(Op0, m_c_And(m_Value(A), m_Not(m_Value(B)))) && in foldOrToXor()
[all …]
/external/llvm/lib/Analysis/
DInstructionSimplify.cpp149 if (BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS)) in ExpandBinOp() local
150 if (Op0->getOpcode() == OpcodeToExpand) { in ExpandBinOp()
152 Value *A = Op0->getOperand(0), *B = Op0->getOperand(1), *C = RHS; in ExpandBinOp()
208 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in SimplifyAssociativeBinOp() local
212 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
213 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
214 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
254 if (Op0 && Op0->getOpcode() == Opcode) { in SimplifyAssociativeBinOp()
255 Value *A = Op0->getOperand(0); in SimplifyAssociativeBinOp()
256 Value *B = Op0->getOperand(1); in SimplifyAssociativeBinOp()
[all …]
/external/llvm/lib/Transforms/InstCombine/
DInstCombineMulDivRem.cpp177 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
182 if (Value *V = SimplifyMulInst(Op0, Op1, DL, TLI, DT, AC)) in visitMul()
190 BinaryOperator *BO = BinaryOperator::CreateNeg(Op0, I.getName()); in visitMul()
252 if (Op0->hasOneUse()) { in visitMul()
255 if (match(Op0, m_Sub(m_Value(Y), m_Value(X)))) in visitMul()
257 else if (match(Op0, m_Add(m_Value(Y), m_ConstantInt(C1)))) in visitMul()
271 if (SelectInst *SI = dyn_cast<SelectInst>(Op0)) in visitMul()
275 if (isa<PHINode>(Op0)) in visitMul()
283 if (match(Op0, m_OneUse(m_Add(m_Value(X), m_Constant(C1))))) { in visitMul()
293 if (Value *Op0v = dyn_castNegVal(Op0)) { // -X * -Y = X*Y in visitMul()
[all …]
DInstCombineAndOrXor.cpp878 Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1); in FoldAndOfICmps() local
881 return getNewICmpValue(isSigned, Code, Op0, Op1, Builder); in FoldAndOfICmps()
1162 Value *Op0 = I.getOperand(0); in matchDeMorgansLaws() local
1165 if (Value *Op0NotVal = dyn_castNotVal(Op0)) in matchDeMorgansLaws()
1167 if (Op0->hasOneUse() && Op1->hasOneUse()) { in matchDeMorgansLaws()
1179 if (match(Op0, m_OneUse(m_Xor(m_ZExt(m_Value(A)), m_ConstantInt(C1)))) && in matchDeMorgansLaws()
1202 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldCastedBitwiseLogic() local
1203 CastInst *Cast0 = dyn_cast<CastInst>(Op0); in foldCastedBitwiseLogic()
1221 if ((match(Op0, m_BitCast(m_Value(BC))) && match(Op1, m_Constant(C)))) { in foldCastedBitwiseLogic()
1283 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldBoolSextMaskToSelect() local
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DFastISel.h168 unsigned Op0, bool Op0IsKill);
177 unsigned Op0, bool Op0IsKill,
187 unsigned Op0, bool Op0IsKill,
197 unsigned Op0, bool Op0IsKill,
207 unsigned Op0, bool Op0IsKill,
217 unsigned Op0, bool Op0IsKill,
247 unsigned Op0, bool Op0IsKill);
254 unsigned Op0, bool Op0IsKill,
262 unsigned Op0, bool Op0IsKill,
271 unsigned Op0, bool Op0IsKill,
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelDAGToDAG.cpp270 SDValue Op0, Op1; in SelectInlineAsmMemoryOperand() local
274 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1) in SelectInlineAsmMemoryOperand()
275 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1)) in SelectInlineAsmMemoryOperand()
276 SelectXFormAddr(Op.getNode(), Op, Op0, Op1); in SelectInlineAsmMemoryOperand()
279 if (!SelectDFormAddr(Op.getNode(), Op, Op0, Op1) in SelectInlineAsmMemoryOperand()
280 && !SelectAFormAddr(Op.getNode(), Op, Op0, Op1)) { in SelectInlineAsmMemoryOperand()
281 Op0 = Op; in SelectInlineAsmMemoryOperand()
289 SelectAddrIdxOnly(Op, Op, Op0, Op1); in SelectInlineAsmMemoryOperand()
294 OutOps.push_back(Op0); in SelectInlineAsmMemoryOperand()
347 SDValue Op0 = N.getOperand(0); in SelectAFormAddr() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DScalarizer.cpp98 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
100 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); in operator ()()
111 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
113 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); in operator ()()
124 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
126 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); in operator ()()
418 Scatterer Op0 = scatter(&I, I.getOperand(0)); in splitBinary() local
420 assert(Op0.size() == NumElems && "Mismatched binary operation"); in splitBinary()
425 Res[Elem] = Split(Builder, Op0[Elem], Op1[Elem], in splitBinary()
517 Scatterer Op0 = scatter(&SI, SI.getOperand(0)); in visitSelectInst() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DFastISel.cpp362 unsigned Op0 = getRegForValue(I->getOperand(0)); in SelectBinaryOp() local
363 if (Op0 == 0) // Unhandled operand. Halt "fast" selection and bail. in SelectBinaryOp()
380 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in SelectBinaryOp()
392 ISDOpcode, Op0, Op0IsKill, CF); in SelectBinaryOp()
410 Op0, Op0IsKill, in SelectBinaryOp()
719 unsigned Op0 = getRegForValue(I->getOperand(0)); in SelectBitCast() local
720 if (Op0 == 0) in SelectBitCast()
735 ResultReg).addReg(Op0); in SelectBitCast()
742 ISD::BITCAST, Op0, Op0IsKill); in SelectBitCast()
853 const Value *Op0 = EVI->getOperand(0); in SelectExtractValue() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DMachineIRBuilder.cpp172 void MachineIRBuilderBase::validateBinaryOp(unsigned Res, unsigned Op0, in validateBinaryOp() argument
177 assert(getMRI()->getType(Res) == getMRI()->getType(Op0) && in validateBinaryOp()
181 MachineInstrBuilder MachineIRBuilderBase::buildGEP(unsigned Res, unsigned Op0, in buildGEP() argument
184 getMRI()->getType(Res) == getMRI()->getType(Op0) && "type mismatch"); in buildGEP()
189 .addUse(Op0) in buildGEP()
194 MachineIRBuilderBase::materializeGEP(unsigned &Res, unsigned Op0, in materializeGEP() argument
200 Res = Op0; in materializeGEP()
204 Res = getMRI()->createGenericVirtualRegister(getMRI()->getType(Op0)); in materializeGEP()
208 return buildGEP(Res, Op0, TmpReg); in materializeGEP()
212 unsigned Op0, in buildPtrMask() argument
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZTDC.cpp123 Value *Op0 = I.getOperand(0); in convertFCmp() local
130 auto &Sem = Op0->getType()->getFltSemantics(); in convertFCmp()
216 if (CallInst *CI = dyn_cast<CallInst>(Op0)) { in convertFCmp()
222 Op0 = CI->getArgOperand(0); in convertFCmp()
229 converted(&I, Op0, Mask, Worthy); in convertFCmp()
233 Value *Op0 = I.getOperand(0); in convertICmp() local
239 if (auto *Cast = dyn_cast<BitCastInst>(Op0)) { in convertICmp()
259 } else if (auto *CI = dyn_cast<CallInst>(Op0)) { in convertICmp()
288 Value *Op0, *Op1; in convertLogicOp() local
291 std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))]; in convertLogicOp()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZTDC.cpp123 Value *Op0 = I.getOperand(0); in convertFCmp() local
130 auto &Sem = Op0->getType()->getFltSemantics(); in convertFCmp()
216 if (CallInst *CI = dyn_cast<CallInst>(Op0)) { in convertFCmp()
222 Op0 = CI->getArgOperand(0); in convertFCmp()
229 converted(&I, Op0, Mask, Worthy); in convertFCmp()
233 Value *Op0 = I.getOperand(0); in convertICmp() local
239 if (auto *Cast = dyn_cast<BitCastInst>(Op0)) { in convertICmp()
259 } else if (auto *CI = dyn_cast<CallInst>(Op0)) { in convertICmp()
288 Value *Op0, *Op1; in convertLogicOp() local
291 std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))]; in convertLogicOp()
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