| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.h | 75 void emitRsRt(IValueT Opcode, const Operand *OpRs, const Operand *OpRt,
78 void emitRtRsImm16(IValueT Opcode, const Operand *OpRt, const Operand *OpRs,
81 void emitRtRsImm16Rel(IValueT Opcode, const Operand *OpRt,
82 const Operand *OpRs, const Operand *OpImm,
85 void emitFtRsImm16(IValueT Opcode, const Operand *OpFt, const Operand *OpRs,
88 void emitRdRtSa(IValueT Opcode, const Operand *OpRd, const Operand *OpRt,
91 void emitRdRsRt(IValueT Opcode, const Operand *OpRd, const Operand *OpRs,
92 const Operand *OpRt, const char *InsnName);
95 const Operand *OpFs, const Operand *OpFt, IValueT CC,
99 const Operand *OpFd, const Operand *OpFs,
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| D | IceAssemblerARM32.h | 180 void adc(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
183 void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
186 void and_(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
189 void asr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
196 void bic(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
201 void blx(const Operand *Target);
205 void clz(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond);
207 void cmn(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond);
209 void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond);
213 void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
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| D | IceAssemblerMIPS32.cpp | 143 bool encodeOperand(const Operand *Opnd, IValueT &Value, in encodeOperand()
163 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister()
172 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
177 IValueT encodeFPRegister(const Operand *OpReg, const char *RegName, in encodeFPRegister()
207 void AssemblerMIPS32::emitRsRt(IValueT Opcode, const Operand *OpRs, in emitRsRt()
208 const Operand *OpRt, const char *InsnName) { in emitRsRt()
218 void AssemblerMIPS32::emitRtRsImm16(IValueT Opcode, const Operand *OpRt, in emitRtRsImm16()
219 const Operand *OpRs, const uint32_t Imm, in emitRtRsImm16()
231 void AssemblerMIPS32::emitRtRsImm16Rel(IValueT Opcode, const Operand *OpRt, in emitRtRsImm16Rel()
232 const Operand *OpRs, in emitRtRsImm16Rel()
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| D | IceTargetLoweringX86Base.h | 217 typename std::enable_if<!T::Is64Bit, Operand>::type *
218 loOperand(Operand *Operand);
220 typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) { in loOperand() argument
226 typename std::enable_if<!T::Is64Bit, Operand>::type *
227 hiOperand(Operand *Operand);
229 typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *) { in hiOperand() argument
242 Operand *legalizeUndef(Operand *From, RegNumT RegNum = RegNumT());
312 Operand *Addr);
318 void doMockBoundsCheck(Operand *Opnd) override;
323 void lowerAtomicCmpxchg(Variable *DestPrev, Operand *Ptr, Operand *Expected,
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| D | IceAssemblerARM32.cpp | 352 EncodedOperand encodeOperand(const Operand *Opnd, IValueT &Value, in encodeOperand()
388 Operand *Amt = FlexReg->getShiftAmt(); in encodeOperand()
480 EncodedOperand encodeAddress(const Operand *Opnd, IValueT &Value, in encodeAddress()
540 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet, in encodeRegister()
549 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName, in encodeGPRegister()
554 IValueT encodeSRegister(const Operand *OpReg, const char *RegName, in encodeSRegister()
559 IValueT encodeDRegister(const Operand *OpReg, const char *RegName, in encodeDRegister()
564 IValueT encodeQRegister(const Operand *OpReg, const char *RegName, in encodeQRegister()
815 const Operand *OpRd, const Operand *OpRn, in emitType01()
816 const Operand *OpSrc1, bool SetFlags, in emitType01()
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| /external/v8/src/ia32/ |
| D | assembler-ia32.h | 289 friend class Operand; variable
309 class V8_EXPORT_PRIVATE Operand {
312 V8_INLINE explicit Operand(Register reg) { set_modrm(3, reg); } in Operand() function
315 V8_INLINE explicit Operand(XMMRegister xmm_reg) { in Operand() function
321 V8_INLINE explicit Operand(int32_t disp, RelocInfo::Mode rmode) { in Operand() function
327 V8_INLINE explicit Operand(Immediate imm) { in Operand() function
333 explicit Operand(Register base, int32_t disp,
337 explicit Operand(Register base, Register index, ScaleFactor scale,
341 explicit Operand(Register index, ScaleFactor scale, int32_t disp,
344 static Operand JumpTable(Register index, ScaleFactor scale, Label* table) { in JumpTable()
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| D | codegen-ia32.cc | 29 __ movsd(xmm0, Operand(esp, 1 * kPointerSize)); in CreateSqrtFunction()
31 __ movsd(Operand(esp, 1 * kPointerSize), xmm0); in CreateSqrtFunction()
33 __ fld_d(Operand(esp, 1 * kPointerSize)); in CreateSqrtFunction()
73 __ movdq(alignment == MOVE_ALIGNED, xmm0, Operand(src, 0x00)); in MemMoveEmitMainLoop()
74 __ movdq(alignment == MOVE_ALIGNED, xmm1, Operand(src, 0x10)); in MemMoveEmitMainLoop()
75 __ movdq(alignment == MOVE_ALIGNED, xmm2, Operand(src, 0x20)); in MemMoveEmitMainLoop()
76 __ movdq(alignment == MOVE_ALIGNED, xmm3, Operand(src, 0x30)); in MemMoveEmitMainLoop()
79 __ movdqa(Operand(dst, 0x00), xmm0); in MemMoveEmitMainLoop()
80 __ movdqa(Operand(dst, 0x10), xmm1); in MemMoveEmitMainLoop()
81 __ movdqa(Operand(dst, 0x20), xmm2); in MemMoveEmitMainLoop()
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| D | deoptimizer-ia32.cc | 33 __ movsd(Operand(esp, offset), xmm_reg); in Generate()
43 __ movss(Operand(esp, offset), xmm_reg); in Generate()
56 __ mov(ebx, Operand(esp, kSavedRegistersAreaSize)); in Generate()
60 __ mov(ecx, Operand(esp, kSavedRegistersAreaSize + 1 * kPointerSize)); in Generate()
61 __ lea(edx, Operand(esp, kSavedRegistersAreaSize + 2 * kPointerSize)); in Generate()
70 __ mov(edi, Operand(ebp, CommonFrameConstants::kContextOrFrameTypeOffset)); in Generate()
72 __ mov(eax, Operand(ebp, JavaScriptFrameConstants::kFunctionOffset)); in Generate()
74 __ mov(Operand(esp, 0 * kPointerSize), eax); // Function. in Generate()
75 __ mov(Operand(esp, 1 * kPointerSize), in Generate()
77 __ mov(Operand(esp, 2 * kPointerSize), ebx); // Bailout id. in Generate()
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| D | assembler-ia32.cc | 235 Operand::Operand(Register base, int32_t disp, RelocInfo::Mode rmode) { in Operand() function in v8::internal::Operand
255 Operand::Operand(Register base, in Operand() function in v8::internal::Operand
280 Operand::Operand(Register index, in Operand() function in v8::internal::Operand
292 bool Operand::is_reg_only() const { in is_reg_only()
297 Register Operand::reg() const { in reg()
529 void Assembler::push(Operand src) { in push()
542 void Assembler::pop(Operand dst) { in pop()
562 void Assembler::mov_b(Register dst, Operand src) { in mov_b()
569 void Assembler::mov_b(Operand dst, const Immediate& src) { in mov_b()
576 void Assembler::mov_b(Operand dst, Register src) { in mov_b()
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| D | macro-assembler-ia32.h | 54 typedef Operand MemOperand;
132 void Move(Operand dst, const Immediate& src);
171 inline void JumpIfSmi(Operand value, Label* smi_label,
230 void Lzcnt(Register dst, Register src) { Lzcnt(dst, Operand(src)); } in Lzcnt()
231 void Lzcnt(Register dst, Operand src);
233 void Tzcnt(Register dst, Register src) { Tzcnt(dst, Operand(src)); } in Tzcnt()
234 void Tzcnt(Register dst, Operand src);
236 void Popcnt(Register dst, Register src) { Popcnt(dst, Operand(src)); } in Popcnt()
237 void Popcnt(Register dst, Operand src);
253 Operand StaticVariable(const ExternalReference& ext);
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCPseudoLowering.inc | 18 // Operand: wd
21 // Operand: ws
24 // Operand: wt
34 // Operand: wd
37 // Operand: ws
40 // Operand: wt
50 // Operand: wd
53 // Operand: ws
56 // Operand: wt
66 // Operand: rs
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| /external/v8/src/regexp/mips64/ |
| D | regexp-macro-assembler-mips64.cc | 150 __ li(v0, Operand(FAILURE)); in RegExpMacroAssemblerMIPS()
178 current_input_offset(), Operand(by * char_size())); in AdvanceCurrentPosition()
188 __ Daddu(a0, a0, Operand(by)); in AdvanceRegister()
209 BranchOrBacktrack(on_equal, eq, current_character(), Operand(c)); in CheckCharacter()
214 BranchOrBacktrack(on_greater, gt, current_character(), Operand(limit)); in CheckCharacterGT()
220 __ Daddu(a0, current_input_offset(), Operand(-char_size())); in CheckAtStart()
221 BranchOrBacktrack(on_at_start, eq, a0, Operand(a1)); in CheckAtStart()
229 Operand(-char_size() + cp_offset * char_size())); in CheckNotAtStart()
230 BranchOrBacktrack(on_not_at_start, ne, a0, Operand(a1)); in CheckNotAtStart()
235 BranchOrBacktrack(on_less, lt, current_character(), Operand(limit)); in CheckCharacterLT()
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| /external/v8/src/regexp/mips/ |
| D | regexp-macro-assembler-mips.cc | 113 __ li(v0, Operand(FAILURE)); in RegExpMacroAssemblerMIPS()
141 current_input_offset(), Operand(by * char_size())); in AdvanceCurrentPosition()
151 __ Addu(a0, a0, Operand(by)); in AdvanceRegister()
172 BranchOrBacktrack(on_equal, eq, current_character(), Operand(c)); in CheckCharacter()
177 BranchOrBacktrack(on_greater, gt, current_character(), Operand(limit)); in CheckCharacterGT()
183 __ Addu(a0, current_input_offset(), Operand(-char_size())); in CheckAtStart()
184 BranchOrBacktrack(on_at_start, eq, a0, Operand(a1)); in CheckAtStart()
192 Operand(-char_size() + cp_offset * char_size())); in CheckNotAtStart()
193 BranchOrBacktrack(on_not_at_start, ne, a0, Operand(a1)); in CheckNotAtStart()
198 BranchOrBacktrack(on_less, lt, current_character(), Operand(limit)); in CheckCharacterLT()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenMCPseudoLowering.inc | 18 // Operand: target
21 // Operand: p
31 // Operand: wb
34 // Operand: Rn
37 // Operand: p
42 // Operand: regs
56 // Operand: Rd
59 // Operand: Rn
62 // Operand: Rm
65 // Operand: Ra
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| /external/v8/src/x64/ |
| D | assembler-x64.h | 313 class Operand {
323 Operand(Register base, int32_t disp);
326 Operand(Register base,
332 Operand(Register index,
339 Operand(Operand base, int32_t offset);
342 explicit Operand(Label* label, int addend = 0);
344 Operand(const Operand&) = default;
362 ASSERT_TRIVIALLY_COPYABLE(Operand);
363 static_assert(sizeof(Operand) <= 2 * kPointerSize,
656 void pushq(Operand src);
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| D | deoptimizer-x64.cc | 36 __ Movsd(Operand(rsp, offset), xmm_reg); in Generate()
46 __ Movss(Operand(rsp, offset), xmm_reg); in Generate()
69 __ movp(rax, Operand(rsp, kSavedRegistersAreaSize)); in Generate()
72 __ leap(rdx, Operand(&deopt_table_entry)); in Generate()
88 __ movp(arg_reg_4, Operand(rsp, kSavedRegistersAreaSize + 1 * kRegisterSize)); in Generate()
89 __ leap(arg5, Operand(rsp, kSavedRegistersAreaSize + 1 * kRegisterSize + in Generate()
99 __ movp(rdi, Operand(rbp, CommonFrameConstants::kContextOrFrameTypeOffset)); in Generate()
101 __ movp(rax, Operand(rbp, JavaScriptFrameConstants::kFunctionOffset)); in Generate()
110 __ movq(Operand(rsp, 4 * kRegisterSize), arg5); in Generate()
112 __ movq(Operand(rsp, 5 * kRegisterSize), arg5); in Generate()
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| D | macro-assembler-x64.h | 51 typedef Operand MemOperand;
99 Operand GetArgumentOperand(int index);
100 Operand GetReceiverOperand() { in GetReceiverOperand()
215 void Set(Operand dst, intptr_t x);
219 void LoadRoot(Operand destination, Heap::RootListIndex index) { in LoadRoot()
225 void Push(Operand src);
256 void Cvtss2sd(XMMRegister dst, Operand src);
258 void Cvtsd2ss(XMMRegister dst, Operand src);
260 void Cvttsd2si(Register dst, Operand src);
262 void Cvttsd2siq(Register dst, Operand src);
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| /external/v8/src/regexp/arm/ |
| D | regexp-macro-assembler-arm.cc | 135 current_input_offset(), Operand(by * char_size())); in AdvanceCurrentPosition()
145 __ add(r0, r0, Operand(by)); in AdvanceRegister()
155 __ add(pc, r0, Operand(code_pointer())); in Backtrack()
165 __ cmp(current_character(), Operand(c)); in CheckCharacter()
171 __ cmp(current_character(), Operand(limit)); in CheckCharacterGT()
178 __ add(r0, current_input_offset(), Operand(-char_size())); in CheckAtStart()
188 Operand(-char_size() + cp_offset * char_size())); in CheckNotAtStart()
195 __ cmp(current_character(), Operand(limit)); in CheckCharacterLT()
204 backtrack_stackpointer(), Operand(kPointerSize), LeaveCC, eq); in CheckGreedyLoop()
228 __ cmn(r1, Operand(current_input_offset())); in CheckNotBackReferenceIgnoreCase()
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| /external/vixl/test/ |
| D | test-operands.cc | 44 aarch32::Operand op = aarch32::Operand::From(42); in TEST_AARCH32()
50 aarch32::Operand op = aarch32::Operand::From(-42); in TEST_AARCH32()
58 aarch32::Operand op = aarch32::Operand::From(-1); in TEST_AARCH32()
64 aarch32::Operand op = aarch32::Operand::From(UINT32_MAX); in TEST_AARCH32()
70 aarch32::Operand op = aarch32::Operand::From(INT32_MAX); in TEST_AARCH32()
76 aarch32::Operand op = aarch32::Operand::From(INT32_MIN); in TEST_AARCH32()
84 aarch32::Operand op = aarch32::Operand::From(INT64_C(-1)); in TEST_AARCH32()
90 aarch32::Operand op = aarch32::Operand::From(INT64_C(-42)); in TEST_AARCH32()
100 aarch32::Operand op = aarch32::Operand::From(&data); in TEST_AARCH32()
108 aarch32::Operand op = aarch32::Operand::From(data); in TEST_AARCH32()
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| /external/v8/src/regexp/ppc/ |
| D | regexp-macro-assembler-ppc.cc | 118 __ li(r3, Operand(FAILURE)); in RegExpMacroAssemblerPPC()
146 Operand(by * char_size())); in AdvanceCurrentPosition()
156 __ mov(r0, Operand(by)); in AdvanceRegister()
176 __ Cmpli(current_character(), Operand(c), r0); in CheckCharacter()
182 __ Cmpli(current_character(), Operand(limit), r0); in CheckCharacterGT()
189 __ addi(r3, current_input_offset(), Operand(-char_size())); in CheckAtStart()
199 Operand(-char_size() + cp_offset * char_size())); in CheckNotAtStart()
206 __ Cmpli(current_character(), Operand(limit), r0); in CheckCharacterLT()
217 Operand(kPointerSize)); in CheckGreedyLoop()
267 __ addi(r3, r3, Operand(char_size())); in CheckNotBackReferenceIgnoreCase()
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| /external/v8/src/regexp/s390/ |
| D | regexp-macro-assembler-s390.cc | 117 __ LoadImmP(r2, Operand(FAILURE)); in RegExpMacroAssemblerS390()
141 __ AddP(current_input_offset(), Operand(by * char_size())); in AdvanceCurrentPosition()
150 __ AddMI(register_location(reg), Operand(by)); in AdvanceRegister()
153 __ mov(r0, Operand(by)); in AdvanceRegister()
171 __ CmpLogicalP(current_character(), Operand(c)); in CheckCharacter()
176 __ CmpLogicalP(current_character(), Operand(limit)); in CheckCharacterGT()
182 __ AddP(r2, current_input_offset(), Operand(-char_size())); in CheckAtStart()
191 Operand(-char_size() + cp_offset * char_size())); in CheckNotAtStart()
197 __ CmpLogicalP(current_character(), Operand(limit)); in CheckCharacterLT()
205 __ AddP(backtrack_stackpointer(), Operand(kPointerSize)); in CheckGreedyLoop()
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| D | MCInstrDescView.cpp | 26 Operand Operand; in Instruction() local
27 Operand.Index = OpIndex; in Instruction()
28 Operand.IsDef = (OpIndex < MCInstrDesc.getNumDefs()); in Instruction()
29 Operand.IsExplicit = true; in Instruction()
32 Operand.Tracker = &RATC.getRegisterClass(OpInfo.RegClass); in Instruction()
33 Operand.TiedToIndex = in Instruction()
35 Operand.Info = &OpInfo; in Instruction()
36 Operands.push_back(Operand); in Instruction()
40 Operand Operand; in Instruction() local
41 Operand.Index = OpIndex; in Instruction()
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| /external/v8/src/regexp/x64/ |
| D | regexp-macro-assembler-x64.cc | 177 __ leap(rax, Operand(rdi, -char_size())); in CheckAtStart()
178 __ cmpp(rax, Operand(rbp, kStringStartMinusOne)); in CheckAtStart()
185 __ leap(rax, Operand(rdi, -char_size() + cp_offset * char_size())); in CheckNotAtStart()
186 __ cmpp(rax, Operand(rbp, kStringStartMinusOne)); in CheckNotAtStart()
199 __ cmpl(rdi, Operand(backtrack_stackpointer(), 0)); in CheckGreedyLoop()
228 __ movl(rax, Operand(rbp, kStringStartMinusOne)); in CheckNotBackReferenceIgnoreCase()
244 __ leap(r9, Operand(rsi, rdx, times_1, 0)); in CheckNotBackReferenceIgnoreCase()
245 __ leap(r11, Operand(rsi, rdi, times_1, 0)); in CheckNotBackReferenceIgnoreCase()
257 __ movzxbl(rdx, Operand(r9, 0)); in CheckNotBackReferenceIgnoreCase()
258 __ movzxbl(rax, Operand(r11, 0)); in CheckNotBackReferenceIgnoreCase()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFExpression.cpp | 125 for (unsigned Operand = 0; Operand < 2; ++Operand) { in extract() local
126 unsigned Size = Desc.Op[Operand]; in extract()
134 Operands[Operand] = Data.getU8(&Offset); in extract()
136 Operands[Operand] = (int8_t)Operands[Operand]; in extract()
139 Operands[Operand] = Data.getU16(&Offset); in extract()
141 Operands[Operand] = (int16_t)Operands[Operand]; in extract()
144 Operands[Operand] = Data.getU32(&Offset); in extract()
146 Operands[Operand] = (int32_t)Operands[Operand]; in extract()
149 Operands[Operand] = Data.getU64(&Offset); in extract()
153 Operands[Operand] = Data.getU64(&Offset); in extract()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonOperands.td | 50 def s32Imm : Operand<i32> { let ParserMatchClass = s32ImmOperand;
52 def s23_2Imm : Operand<i32> { let ParserMatchClass = s23_2ImmOperand; }
53 def s8Imm : Operand<i32> { let ParserMatchClass = s8ImmOperand;
55 def s8Imm64 : Operand<i64> { let ParserMatchClass = s8Imm64Operand;
57 def s6Imm : Operand<i32> { let ParserMatchClass = s6ImmOperand;
59 def s6_3Imm : Operand<i32>;
60 def s4Imm : Operand<i32> { let ParserMatchClass = s4ImmOperand;
62 def s4_0Imm : Operand<i32> { let ParserMatchClass = s4_0ImmOperand;
64 def s4_1Imm : Operand<i32> { let ParserMatchClass = s4_1ImmOperand;
66 def s4_2Imm : Operand<i32> { let ParserMatchClass = s4_2ImmOperand;
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