| /external/u-boot/drivers/phy/ |
| D | Kconfig | 2 menu "PHY Subsystem"
4 config PHY config
5 bool "PHY Core"
8 PHY support.
10 This framework is designed to provide a generic interface for PHY
11 devices. PHY devices are dedicated hardware that handle the physical
16 PHY, power on/off the PHY, and reset the PHY. It's meant to be as
21 bool "PHY Core in SPL"
24 PHY support in SPL.
26 This framework is designed to provide a generic interface for PHY
[all …]
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| /external/u-boot/Documentation/devicetree/bindings/phy/ |
| D | phy-stm32-usbphyc.txt | 1 STMicroelectronics STM32 USB HS PHY controller
3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4 switch. It controls PHY configuration and status, and the UTMI+ switch that
5 selects either OTG or HOST controller for the second PHY port. It also sets
11 |_ PHY port#1 _________________ HOST controller
14 |_ PHY port#2 ----| |________________
41 - phy-supply: phandle to the regulator providing 3V3 power to the PHY,
43 - vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
44 - vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
45 - #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
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| D | no-op.txt | 1 NOP PHY driver
3 This driver is used to stub PHY operations in a driver (USB, SATA).
4 This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
5 and there is no actual PHY harwdare to drive.
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| /external/u-boot/board/keymile/km_arm/ |
| D | km_arm.c | 370 { PHY(0), PHY_PAGE, AN1000FIX_PAGE },
371 { PHY(0), PHY_STATUS, AN1000FIX },
372 { PHY(0), PHY_PAGE, 0 },
376 { PHY(0), PHY_1000_CTRL, NO_ADV },
377 { PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
378 { PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
382 { PHY(1), PHY_CTRL, PHY_PWR_DOWN },
383 { PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
386 { PHY(2), PHY_CTRL, PHY_PWR_DOWN },
387 { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
[all …]
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| /external/u-boot/drivers/net/phy/ |
| D | Kconfig | 9 bool "Ethernet PHY (physical media interface) support"
12 Enable Ethernet PHY (physical media interface) support.
24 int "PHY address"
28 The address of PHY on MII bus. Usually in range of 0 to 31.
32 bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
44 hex "Bitmask of PHY ports"
49 bool "Marvel MV88E61xx Ethernet switch PHY support."
57 hex "Bitmask of PHY Ports"
65 bool "Generic 10G PHY support"
86 bool "LXT971 Ethernet PHY support"
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| /external/u-boot/drivers/usb/dwc3/ |
| D | Kconfig | 53 menu "PHY Subsystem"
56 bool "TI OMAP SoC series USB DRD PHY driver"
58 Enable single driver for both USB2 PHY programming and USB3 PHY
62 bool "Exynos5 SoC series USB DRD PHY driver"
64 Enable USB DRD PHY support for Exynos 5 SoC series.
65 This driver provides PHY interface for USB 3.0 DRD controller
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| /external/u-boot/drivers/usb/phy/ |
| D | Kconfig | 9 bool "TWL4030 PHY"
12 bool "OMAP PHY"
15 bool "Rockchip USB2 PHY"
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| /external/u-boot/arch/arm/mach-uniphier/ |
| D | Kconfig | 104 bool "Enable dump command of DDR PHY parameters"
109 The command "ddrphy" shows the resulting parameters of DDR PHY
110 training; it is useful for the evaluation of DDR PHY training.
113 bool "Enable dump command of DDR Multi PHY parameters"
117 The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
118 training; it is useful for the evaluation of DDR Multi PHY training.
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| /external/u-boot/drivers/phy/allwinner/ |
| D | Kconfig | 5 bool "Allwinner Sun4I USB PHY driver"
7 select PHY
12 This driver controls the entire USB PHY block, both the USB OTG
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| /external/u-boot/doc/device-tree-bindings/net/ |
| D | fsl-tsec-phy.txt | 21 Child nodes of the TSEC controller are typically the individual PHY devices
26 The MDIO is a bus to which the PHY devices are connected. For each
27 device that exists on this bus, a PHY node should be created.
47 As of this writing, every tsec is associated with an internal TBI PHY.
48 This PHY is accessed through the local MDIO bus. These buses are defined
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| D | ethernet.txt | 12 - phy-mode: string, operation mode of the PHY interface; supported values are
17 - phy-handle: phandle, specifies a reference to a node representing a PHY
23 Child nodes of the Ethernet controller are typically the individual PHY devices
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| D | snps,dwc-qos-ethernet.txt | 26 In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX
28 drive the PHY TX path.
32 PHY's RX clock output. In other configurations, other clocks (such as
34 In cases where the PHY clock is directly fed into the EQOS receive path
36 is assumed to be fully under the control of the PHY device/driver. In
64 This will allow easy support for configurations that support multiple PHY
107 - phy-reset-gpios: Phandle and specifier for any GPIO used to reset the PHY.
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| /external/u-boot/drivers/usb/ulpi/ |
| D | Kconfig | 9 UTMI (USB PHY) via ULPI interface.
28 Select to commnicate with USB PHY via ULPI interface.
30 PHY Transreceiver for USB controllers.
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| /external/u-boot/board/keymile/km83xx/ |
| D | km83xx.c | 207 { PHY(1), PHY_1000_CTRL, NO_ADV },
208 { PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN },
209 { PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
213 { PHY(2), PHY_CTRL, PHY_PWR_DOWN },
214 { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
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| /external/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| D | Kconfig | 69 Workaround for USB PHY erratum A008997
74 Workaround for USB PHY erratum A009007
79 Workaround for USB PHY erratum A009008
84 Workaround for USB PHY erratum A009798
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| /external/u-boot/board/toradex/colibri_imx7/ |
| D | Kconfig | 13 bool "External oscillator for Ethernet PHY clock provided"
15 Select this if your module provides a external Ethernet PHY
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| /external/u-boot/board/birdland/bav335x/ |
| D | Kconfig | 20 used 10/100 Ethernet PHY while Rev.B uses a Gigabit Ethernet PHY.
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| D | README | 11 The binary produced supports the bav335x Rev.A with 10/100 MB PHY
12 and Rev.B (default) with GB ethernet PHY.
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| /external/u-boot/drivers/net/ |
| D | Kconfig | 34 bool "Enable GbE PHY status parsing and configuration"
151 provide the PHY (physical media interface).
381 int "FEC1 PHY"
385 Define to the hardcoded PHY address which corresponds
388 means that the PHY with address 4 is connected to FEC1
397 The PHY does not have a RXERR line (RMII only).
406 int "FEC2 PHY"
410 Define to the hardcoded PHY address which corresponds
413 means that the PHY with address 4 is connected to FEC1
422 The PHY does not have a RXERR line (RMII only).
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| /external/u-boot/doc/device-tree-bindings/phy/ |
| D | phy-stih407-usb.txt | 1 ST STiH407 USB PHY controller
3 This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and U…
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| /external/tcpdump/tests/ |
| D | lldp_asan.out | 5 MAC/PHY configuration/status Subtype (1)
10 MAC/PHY configuration/status Subtype (1)
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| D | lldp_cdp-ev.out | 56 MAC/PHY configuration/status Subtype (1)
78 MAC/PHY configuration/status Subtype (1)
100 MAC/PHY configuration/status Subtype (1)
122 MAC/PHY configuration/status Subtype (1)
182 MAC/PHY configuration/status Subtype (1)
204 MAC/PHY configuration/status Subtype (1)
226 MAC/PHY configuration/status Subtype (1)
248 MAC/PHY configuration/status Subtype (1)
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| /external/u-boot/board/freescale/t208xrdb/ |
| D | README | 27 - Two high-speed USB 2.0 controllers with integrated PHY
113 0xEFE00000 0xEFE3FFFF PHY CS4315 firmware 256KB
121 0xEBE00000 0xEBE3FFFF PHY CS4315 firmware (alt bank) 256KB
130 Label In Uboot In Linux FMan Address Comments PHY
251 How to update the ucode of Cortina CS4315/CS4340 10G PHY
253 => tftp 1000000 CS4315-CS4340-PHY-ucode.txt
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| /external/u-boot/doc/device-tree-bindings/video/ |
| D | exynos_mipi_dsi.txt | 36 "set_tear_on" command, BTA requests to D-PHY automatically.
45 - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode
46 - RxValid and RxLpdt specifies signal from D-PHY.
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| /external/u-boot/drivers/usb/eth/ |
| D | Kconfig | 31 This driver supports the internal PHY.
41 This driver supports the internal PHY.
|