Searched refs:SHLD (Results 1 – 25 of 29) sorted by relevance
12
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | rot32.ll | 3 …UN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
75 ; SHLD-LABEL: xfoo:
76 ; SHLD: # %bb.0: # %entry
77 ; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
78 ; SHLD-NEXT: shldl $7, %eax, %eax
79 ; SHLD-NEXT: retl
100 ; SHLD-LABEL: xfoop:
101 ; SHLD: # %bb.0: # %entry
102 ; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
103 ; SHLD-NEXT: movl (%eax), %eax
[all …]
|
| D | rot64.ll | 3 …: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
73 ; SHLD-LABEL: xfoo:
74 ; SHLD: # %bb.0: # %entry
75 ; SHLD-NEXT: shldq $7, %rdi, %rdi
76 ; SHLD-NEXT: movq %rdi, %rax
77 ; SHLD-NEXT: retq
97 ; SHLD-LABEL: xfoop:
98 ; SHLD: # %bb.0: # %entry
99 ; SHLD-NEXT: movq (%rdi), %rax
100 ; SHLD-NEXT: shldq $7, %rax, %rax
[all …]
|
| D | shift-double-x86_64.ll | 4 ; SHLD/SHRD manual shifts
|
| D | shift-double.ll | 98 ; Combine 2xi32/2xi16 shifts into SHLD
272 ; SHLD/SHRD manual shifts
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86.td | 102 "SHLD instruction is slow">;
328 // Sandy Bridge and newer processors can use SHLD with the same source on both
334 "SHLD can be used as a faster rotate">;
|
| D | X86ISelLowering.h | 40 SHLD, enumerator
|
| D | X86ScheduleBtVer2.td | 213 // SHLD/SHRD.
|
| D | X86SchedSandyBridge.td | 129 // SHLD/SHRD.
|
| D | X86ScheduleZnver1.td | 742 // SHRD SHLD.
|
| D | X86SchedSkylakeClient.td | 151 // SHLD/SHRD.
|
| D | X86SchedBroadwell.td | 152 // SHLD/SHRD.
|
| D | X86SchedHaswell.td | 135 // SHLD/SHRD.
|
| D | X86InstrShiftRotate.td | 807 // SHLD to avoid a partial flag update on the normal rotate instructions.
|
| D | X86SchedSkylakeServer.td | 144 // SHLD/SHRD.
|
| D | X86InstrCompiler.td | 1744 defm : MaskedDoubleShiftAmountPats<X86shld, "SHLD">;
|
| D | X86InstrInfo.td | 139 def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
|
| D | X86ISelLowering.cpp | 16196 Tmp2 = DAG.getNode(X86ISD::SHLD, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts()
25898 case X86ISD::SHLD: return "X86ISD::SHLD"; in getTargetNodeName()
35158 unsigned Opc = X86ISD::SHLD; in combineOr()
35195 unsigned InnerShift = (X86ISD::SHLD == Opc ? ISD::SRL : ISD::SHL); in combineOr()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.h | 41 SHLD, enumerator
|
| D | X86GenFastISel.inc | 3855 // FastEmit functions for X86ISD::SHLD.
4080 …case X86ISD::SHLD: return FastEmit_X86ISD_SHLD_rri(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill, imm2…
|
| D | X86InstrInfo.td | 123 def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
|
| D | X86ISelLowering.cpp | 7560 Tmp2 = DAG.getNode(X86ISD::SHLD, dl, VT, ShOpHi, ShOpLo, ShAmt); in LowerShiftParts()
10623 case X86ISD::SHLD: return "X86ISD::SHLD"; in getTargetNodeName()
13496 unsigned Opc = X86ISD::SHLD; in PerformOrCombine()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 40 SHLD, enumerator
|
| D | X86.td | 101 "SHLD instruction is slow">;
|
| D | X86SchedHaswell.td | 794 // SHRD SHLD.
812 def : InstRW<[WriteShlDCL], (instregex "SHLD(16|32|64)rrCL")>;
|
| D | X86InstrInfo.td | 133 def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
|
12