| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenGlobalISel.inc | 3006 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v4s32,
3007 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v4s32,
3008 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s8,
3009 GIR_MakeTempReg, /*TempRegID*/3, /*TypeID*/GILLT_v16s8,
3011 GIR_AddTempRegister, /*InsnID*/4, /*TempRegID*/3, /*TempRegFlags*/RegState::Define,
3015 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
3016 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/3, /*TempRegFlags*/0,
3020 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
3021 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/2, /*TempRegFlags*/0,
3024 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
[all …]
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenGlobalISel.inc | 2560 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
2561 GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
2562 GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
2564 GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
2568 GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
2572 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
2573 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
2574 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
2578 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
2594 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | InstructionSelectorImpl.h | 765 int64_t TempRegID = MatchTable[CurrentIdx++]; in executeMatchTable() local
768 OutMIs[InsnID].addReg(State.TempRegisters[TempRegID], TempRegFlags); in executeMatchTable()
771 << InsnID << "], TempRegisters[" << TempRegID in executeMatchTable()
917 int64_t TempRegID = MatchTable[CurrentIdx++]; in executeMatchTable() local
920 State.TempRegisters[TempRegID] = in executeMatchTable()
923 dbgs() << CurrentIdx << ": TempRegs[" << TempRegID in executeMatchTable()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | GlobalISelEmitter.cpp | 2346 unsigned TempRegID; member in __anon685cc1160111::TempRegRenderer
2350 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false) in TempRegRenderer() argument
2351 : OperandRenderer(OR_Register), InsnID(InsnID), TempRegID(TempRegID), in TempRegRenderer()
2361 << MatchTable::Comment("TempRegID") << MatchTable::IntValue(TempRegID) in emitRenderOpcodes()
2668 unsigned TempRegID; member in __anon685cc1160111::MakeTempRegisterAction
2671 MakeTempRegisterAction(const LLTCodeGen &Ty, unsigned TempRegID) in MakeTempRegisterAction() argument
2672 : Ty(Ty), TempRegID(TempRegID) {} in MakeTempRegisterAction()
2676 << MatchTable::Comment("TempRegID") << MatchTable::IntValue(TempRegID) in emitActionOpcodes()
3562 unsigned TempRegID = Rule.allocateTempRegID(); in importExplicitUseRenderer() local
3564 InsertPt, OpTyOrNone.getValue(), TempRegID); in importExplicitUseRenderer()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenGlobalISel.inc | 948 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
950 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
956 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
983 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
985 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
991 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
1032 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
1034 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
1040 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
1067 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenGlobalISel.inc | 23296 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
23298 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
23303 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
23335 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
23337 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
23342 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
23364 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
23366 GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
23373 GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
23385 GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
| D | GlobalISelEmitter.td | 301 // R19C-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
303 // R19C-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
314 // R19C-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
|