| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | invalid-UMAAL-arm.txt | 3 # Opcode=419 Name=UMAAL Format=ARM_FORMAT_MULFRM(1)
9 # A8.6.244 UMAAL
|
| D | basic-arm-instructions.txt | 2105 # UMAAL
|
| D | thumb2.txt | 2265 # UMAAL
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-armv7.txt | 341 # Opcode=419 Name=UMAAL Format=ARM_FORMAT_MULFRM(1)
347 # A8.6.244 UMAAL
|
| D | basic-arm-instructions.txt | 2278 # UMAAL
|
| D | thumb2.txt | 2416 # UMAAL
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | invalid-armv7.txt | 341 # Opcode=419 Name=UMAAL Format=ARM_FORMAT_MULFRM(1)
347 # A8.6.244 UMAAL
|
| D | basic-arm-instructions.txt | 2278 # UMAAL
|
| D | thumb2.txt | 2416 # UMAAL
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 168 UMAAL, // 64-bit Unsigned Accumulate Accumulate Multiply enumerator
|
| D | ARMISelDAGToDAG.cpp | 2936 case ARMISD::UMAAL: { in Select()
2937 unsigned Opc = Subtarget->isThumb() ? ARM::t2UMAAL : ARM::UMAAL; in Select()
2970 unsigned opc = Subtarget->isThumb() ? ARM::t2UMAAL : ARM::UMAAL; in Select()
|
| D | ARMScheduleSwift.td | 293 "UMAAL", "t2SMLALS", "t2UMLALS", "t2SMLAL", "t2UMLAL", "t2MLALBB", "t2SMLALBT",
|
| D | ARMISelLowering.cpp | 1218 case ARMISD::UMAAL: return "ARMISD::UMAAL"; in getTargetNodeName()
9013 SDValue UMAAL = DAG.getNode(ARMISD::UMAAL, SDLoc(AddcNode), in AddCombineTo64bitUMAAL() local
9017 DAG.ReplaceAllUsesOfValueWith(SDValue(AddeNode, 0), SDValue(UMAAL.getNode(), 1)); in AddCombineTo64bitUMAAL()
9018 DAG.ReplaceAllUsesOfValueWith(SDValue(AddcNode, 0), SDValue(UMAAL.getNode(), 0)); in AddCombineTo64bitUMAAL()
|
| D | ARMScheduleA9.td | 2502 "UMAAL", "SMLALv5", "UMLALv5", "UMAALv5", "SMLALBB", "SMLALBT", "SMLALTB",
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 202 UMAAL, // 64-bit Unsigned Accumulate Accumulate Multiply enumerator
|
| D | ARMScheduleSwift.td | 310 "UMAAL", "t2SMLAL", "t2UMLAL", "t2SMLALBB", "t2SMLALBT",
|
| D | ARMScheduleR52.td | 282 "UMAAL", "t2SMLAL", "t2UMLAL",
|
| D | ARMISelDAGToDAG.cpp | 2808 case ARMISD::UMAAL: { in Select()
2809 unsigned Opc = Subtarget->isThumb() ? ARM::t2UMAAL : ARM::UMAAL; in Select()
|
| D | ARMISelLowering.cpp | 1347 case ARMISD::UMAAL: return "ARMISD::UMAAL"; in getTargetNodeName()
10273 SDValue UMAAL = DAG.getNode(ARMISD::UMAAL, SDLoc(AddcNode), in AddCombineTo64bitUMAAL() local
10277 DAG.ReplaceAllUsesOfValueWith(SDValue(AddeNode, 0), SDValue(UMAAL.getNode(), 1)); in AddCombineTo64bitUMAAL()
10278 DAG.ReplaceAllUsesOfValueWith(SDValue(AddcNode, 0), SDValue(UMAAL.getNode(), 0)); in AddCombineTo64bitUMAAL()
10300 return DAG.getNode(ARMISD::UMAAL, SDLoc(N), in PerformUMLALCombine()
|
| D | ARMScheduleA9.td | 2553 "UMAAL", "SMLALv5", "UMLALv5", "SMLALBB", "SMLALBT", "SMLALTB",
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2367 @ UMAAL
|
| D | basic-thumb2-instructions.s | 2906 @ UMAAL
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3532 def UMAAL : AMul1I <0b0000010, (outs GPR:$RdLo, GPR:$RdHi),
3560 (UMAAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p)>,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmWriter.inc | 1440 580285U, // UMAAL
4660 35651584U, // UMAAL
|
| D | ARMGenMCCodeEmitter.inc | 933 UINT64_C(4194448), // UMAAL
10634 case ARM::UMAAL: {
12206 Feature_IsARM | Feature_HasV6 | 0, // UMAAL = 920
|