Searched refs:UseRC (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelDAGToDAG.cpp | 162 const TargetRegisterClass *UseRC = in FixRegisterClasses() local
164 if (!DefRC || !UseRC) in FixRegisterClasses()
167 if ((isCC(DefRC) && !isDCC(UseRC)) || (isCC(UseRC) && !isDCC(DefRC))) { in FixRegisterClasses()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 84 const TargetRegisterClass *UseRC = NULL; in EmitCopyFromReg() local
89 UseRC = TLI->getRegClassFor(VT); in EmitCopyFromReg()
119 if (!UseRC) in EmitCopyFromReg()
120 UseRC = RC; in EmitCopyFromReg()
123 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
127 UseRC = ComRC; in EmitCopyFromReg()
143 } else if (UseRC) { in EmitCopyFromReg()
144 assert(UseRC->hasType(VT) && "Incompatible phys register def and uses!"); in EmitCopyFromReg()
145 DstRC = UseRC; in EmitCopyFromReg()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 104 const TargetRegisterClass *UseRC = nullptr; in EmitCopyFromReg() local
109 UseRC = TLI->getRegClassFor(VT); in EmitCopyFromReg()
139 if (!UseRC) in EmitCopyFromReg()
140 UseRC = RC; in EmitCopyFromReg()
143 TRI->getCommonSubClass(UseRC, RC, VT.SimpleTy); in EmitCopyFromReg()
147 UseRC = ComRC; in EmitCopyFromReg()
163 } else if (UseRC) { in EmitCopyFromReg()
164 assert(UseRC->hasType(VT) && "Incompatible phys register def and uses!"); in EmitCopyFromReg()
165 DstRC = UseRC; in EmitCopyFromReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 104 const TargetRegisterClass *UseRC = nullptr; in EmitCopyFromReg() local
109 UseRC = TLI->getRegClassFor(VT); in EmitCopyFromReg()
139 if (!UseRC) in EmitCopyFromReg()
140 UseRC = RC; in EmitCopyFromReg()
143 TRI->getCommonSubClass(UseRC, RC, VT.SimpleTy); in EmitCopyFromReg()
147 UseRC = ComRC; in EmitCopyFromReg()
163 } else if (UseRC) { in EmitCopyFromReg()
164 assert(TRI->isTypeLegalForClass(*UseRC, VT) && in EmitCopyFromReg()
166 DstRC = UseRC; in EmitCopyFromReg()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 479 const TargetRegisterClass *UseRC = in PPCEmitLoad() local
487 bool Is32BitInt = UseRC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitLoad()
507 assert(UseRC->hasSuperClassEq(&PPC::G8RCRegClass) && in PPCEmitLoad()
526 bool IsVSSRC = isVSSRCRegClass(UseRC); in PPCEmitLoad()
527 bool IsVSFRC = isVSFRCRegClass(UseRC); in PPCEmitLoad()
537 ResultReg = createResultReg(UseRC); in PPCEmitLoad()
2419 const TargetRegisterClass *UseRC = in fastEmitInst_ri() local
2423 return FastISel::fastEmitInst_ri(MachineInstOpcode, UseRC, in fastEmitInst_ri()
2433 const TargetRegisterClass *UseRC = in fastEmitInst_r() local
2437 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0, Op0IsKill); in fastEmitInst_r()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 475 const TargetRegisterClass *UseRC = in PPCEmitLoad() local
483 bool Is32BitInt = UseRC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitLoad()
505 assert(UseRC->hasSuperClassEq(&PPC::G8RCRegClass) && in PPCEmitLoad()
535 ResultReg = createResultReg(UseRC); in PPCEmitLoad()
2311 const TargetRegisterClass *UseRC = in fastEmitInst_ri() local
2315 return FastISel::fastEmitInst_ri(MachineInstOpcode, UseRC, in fastEmitInst_ri()
2325 const TargetRegisterClass *UseRC = in fastEmitInst_r() local
2329 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0, Op0IsKill); in fastEmitInst_r()
2339 const TargetRegisterClass *UseRC = in fastEmitInst_rr() local
2343 return FastISel::fastEmitInst_rr(MachineInstOpcode, UseRC, Op0, Op0IsKill, in fastEmitInst_rr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 210 const TargetRegisterClass *UseRC in foldOperand() local
223 if (UseRC->getSize() != 8) in foldOperand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 409 const TargetRegisterClass *UseRC in foldOperand() local
414 if (AMDGPU::getRegBitWidth(UseRC->getID()) != 64) in foldOperand()
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