| /external/capstone/arch/AArch64/ |
| D | AArch64InstPrinter.c | 56 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; in set_mem_access()
57 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_… in set_mem_access()
58 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG… in set_mem_access()
59 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; in set_mem_access()
62 MI->flat_insn->detail->arm64.op_count++; in set_mem_access()
119 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
120 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
121 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
122 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
123 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = getWRegFromXReg… in AArch64_printInst()
[all …]
|
| /external/libhevc/ |
| D | Android.bp | 86 arm64: {
98 "decoder/arm64",
99 "common/arm64",
105 "decoder/arm64/ihevcd_function_selector_av8.c",
108 "common/arm64/ihevc_mem_fns.s",
109 "common/arm64/ihevc_itrans_recon_32x32.s",
110 "common/arm64/ihevc_weighted_pred_bi_default.s",
111 "common/arm64/ihevc_weighted_pred_bi.s",
112 "common/arm64/ihevc_weighted_pred_uni.s",
113 "common/arm64/ihevc_deblk_luma_horz.s",
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | cpus.ll | 4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a55 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
10 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a75 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
13 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m2 2>&1 | FileCheck %s
[all …]
|
| D | machine-outliner-flags.ll | 4 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
9 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
13 ; RUN: -enable-machine-outliner=never -mtriple arm64---- -o /dev/null 2>&1 \
17 ; RUN: --debug-only=machine-outliner -mtriple arm64---- -o /dev/null 2>&1 \
21 ; RUN: -mtriple arm64---- -o /dev/null 2>&1 \
|
| D | simple-macho.ll | 1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
|
| D | arm64-summary-remarks.ll | 1 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -pass-remarks-analysis=asm-printer 2>&1 | FileCheck %s
3 ; CHECK: arm64-summary-remarks.ll:5:0: 1 instructions in function
13 !1 = !DIFile(filename: "arm64-summary-remarks.ll", directory: "")
|
| D | arm64-elf-calls.ll | 1 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-linux-gnu -filetype=obj -o - %s | llvm-objdump -triple=arm64-linux-gnu - …
|
| /external/capstone/cstool/ |
| D | cstool_arm64.c | 13 cs_arm64 *arm64; in print_insn_detail_arm64() local
20 arm64 = &(ins->detail->arm64); in print_insn_detail_arm64()
21 if (arm64->op_count) in print_insn_detail_arm64()
22 printf("\top_count: %u\n", arm64->op_count); in print_insn_detail_arm64()
24 for (i = 0; i < arm64->op_count; i++) { in print_insn_detail_arm64()
25 cs_arm64_op *op = &(arm64->operands[i]); in print_insn_detail_arm64()
94 if (arm64->update_flags) in print_insn_detail_arm64()
97 if (arm64->writeback) in print_insn_detail_arm64()
100 if (arm64->cc) in print_insn_detail_arm64()
101 printf("\tCode-condition: %u\n", arm64->cc); in print_insn_detail_arm64()
|
| /external/google-breakpad/src/common/mac/ |
| D | arch_utilities.cc | 59 NXArchInfo* arm64 = new NXArchInfo; in ArchInfo_arm64() local
60 *arm64 = *NXGetArchInfoFromCpuType(CPU_TYPE_ARM, in ArchInfo_arm64()
62 arm64->name = "arm64"; in ArchInfo_arm64()
63 arm64->cputype = CPU_TYPE_ARM64; in ArchInfo_arm64()
64 arm64->cpusubtype = CPU_SUBTYPE_ARM64_ALL; in ArchInfo_arm64()
65 arm64->description = "arm 64"; in ArchInfo_arm64()
66 return arm64; in ArchInfo_arm64()
100 static const NXArchInfo* arm64 = ArchInfo_arm64(); in BreakpadGetArchInfoFromCpuType() local
101 return arm64; in BreakpadGetArchInfoFromCpuType()
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | cpus.ll | 4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
10 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=vulcan 2>&1 | FileCheck %s
13 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=…
|
| D | simple-macho.ll | 1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
[all …]
|
| /external/capstone/tests/ |
| D | test_arm64.c | 34 cs_arm64 *arm64; in print_insn_detail() local
41 arm64 = &(ins->detail->arm64); in print_insn_detail()
42 if (arm64->op_count) in print_insn_detail()
43 printf("\top_count: %u\n", arm64->op_count); in print_insn_detail()
45 for (i = 0; i < arm64->op_count; i++) { in print_insn_detail()
46 cs_arm64_op *op = &(arm64->operands[i]); in print_insn_detail()
115 if (arm64->update_flags) in print_insn_detail()
118 if (arm64->writeback) in print_insn_detail()
121 if (arm64->cc) in print_insn_detail()
122 printf("\tCode-condition: %u\n", arm64->cc); in print_insn_detail()
|
| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| D | mismatched-intrinsics.ll | 3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| D | mismatched-intrinsics.ll | 3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/bcc/debian/ |
| D | control | 7 libllvm3.7 [!arm64] | libllvm3.8 [!arm64] | libllvm6.0,
8 llvm-3.7-dev [!arm64] | llvm-3.8-dev [!arm64] | llvm-6.0-dev,
9 libclang-3.7-dev [!arm64] | libclang-3.8-dev [!arm64] | libclang-6.0-dev,
10 clang-format | clang-format-3.7 [!arm64] | clang-format-3.8 [!arm64] | clang-format-6.0,
|
| /external/v8/ |
| D | Android.v8.bp | 531 arm64: {
533 "src/arm64/assembler-arm64.cc",
534 "src/arm64/code-stubs-arm64.cc",
535 "src/arm64/codegen-arm64.cc",
536 "src/arm64/cpu-arm64.cc",
537 "src/arm64/decoder-arm64.cc",
538 "src/arm64/deoptimizer-arm64.cc",
539 "src/arm64/disasm-arm64.cc",
540 "src/arm64/eh-frame-arm64.cc",
541 "src/arm64/frame-constants-arm64.cc",
[all …]
|
| /external/capstone/bindings/ocaml/ |
| D | test_arm64.ml | 58 | CS_INFO_ARM64 arm64 -> (
59 if arm64.cc != _ARM64_CC_AL && arm64.cc != _ARM64_CC_INVALID then
60 printf "\tCode condition: %u\n" arm64.cc;
62 if arm64.update_flags then
65 if arm64.writeback then
69 if (Array.length arm64.operands) > 0 then (
70 printf "\top_count: %d\n" (Array.length arm64.operands);
71 Array.iteri (print_op handle) arm64.operands;
|
| D | ocaml.c | 187 Store_field(op_info_val, 0, Val_int(insn[j-1].detail->arm64.cc)); in _cs_disasm()
188 Store_field(op_info_val, 1, Val_bool(insn[j-1].detail->arm64.update_flags)); in _cs_disasm()
189 Store_field(op_info_val, 2, Val_bool(insn[j-1].detail->arm64.writeback)); in _cs_disasm()
191 lcount = insn[j-1].detail->arm64.op_count; in _cs_disasm()
196 switch(insn[j-1].detail->arm64.operands[i].type) { in _cs_disasm()
199 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].reg)); in _cs_disasm()
203 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); in _cs_disasm()
207 Store_field(tmp, 0, Val_int(insn[j-1].detail->arm64.operands[i].imm)); in _cs_disasm()
211 Store_field(tmp, 0, caml_copy_double(insn[j-1].detail->arm64.operands[i].fp)); in _cs_disasm()
216 Store_field(tmp3, 0, Val_int(insn[j-1].detail->arm64.operands[i].mem.base)); in _cs_disasm()
[all …]
|
| D | Makefile | 7 …sparc_const.cmxa sysz_const.cmxa x86_const.cmxa xcore_const.cmxa arm.cmxa arm64.cmxa mips.cmxa ppc…
12 …ocamlopt -o test_arm64 -ccopt $(FLAGS) capstone.cmx ocaml.o arm64.cmx arm64_const.cmx test_arm64.c…
113 arm64.mli: arm64.ml
116 arm64.cmi: arm64.mli
119 arm64.cmx: arm64.ml arm64.cmi
122 arm64.cmxa: arm64.cmx
|
| /external/u-boot/doc/uImage.FIT/ |
| D | multi_spl.its | 26 arch = "arm64";
34 arch = "arm64";
53 arch = "arm64";
61 arch = "arm64";
69 arch = "arm64";
77 arch = "arm64";
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopDataPrefetch/AArch64/ |
| D | large-stride.ll | 1 ; RUN: opt -mcpu=cyclone -mtriple=arm64-apple-ios -loop-data-prefetch -max-prefetch-iters-ahead=100…
2 ; RUN: opt -mcpu=cyclone -mtriple=arm64-apple-ios -loop-data-prefetch -S < %s | FileCheck %s --chec…
3 ; RUN: opt -mcpu=generic -mtriple=arm64-apple-ios -loop-data-prefetch -S < %s | FileCheck %s --chec…
4 ; RUN: opt -mcpu=cyclone -mtriple=arm64-apple-ios -passes=loop-data-prefetch -max-prefetch-iters-ah…
5 ; RUN: opt -mcpu=cyclone -mtriple=arm64-apple-ios -passes=loop-data-prefetch -S < %s | FileCheck %s…
6 ; RUN: opt -mcpu=generic -mtriple=arm64-apple-ios -passes=loop-data-prefetch -S < %s | FileCheck %s…
|
| /external/perfetto/gn/standalone/ |
| D | android.gni | 58 } else if (current_cpu == "arm64") {
62 "platforms/android-${android_api_level}/arch-arm64"
63 android_prebuilt_arch = "android-arm64"
76 } else if (current_cpu == "arm64") {
77 android_app_abi = "arm64-v8a"
|
| /external/syzkaller/docs/linux/ |
| D | setup_linux-host_qemu-vm_arm64-kernel.md | 1 # Setup: Linux host, QEMU vm, arm64 kernel
47 $ ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make defconfig
63 $ ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make -j40
66 If the build was successful, you should have a `arch/arm64/boot/Image` file.
86 -kernel /path/to/arch/arm64/boot/Image \
123 …make TARGETARCH=arm64 [CC=/gcc-linaro-6.3.1-2017.05-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu…
132 "target": "linux/arm64",
136 "syzkaller": "/path/to/syzkaller/arm64/",
|