Searched refs:buswidth (Results 1 – 18 of 18) sorted by relevance
/external/stressapptest/src/ |
D | pattern.cc | 286 int buswidth, in Initialize() argument 302 if (buswidth == 32) { in Initialize() 305 } else if (buswidth == 64) { in Initialize() 308 } else if (buswidth == 128) { in Initialize() 311 } else if (buswidth == 256) { in Initialize() 316 buswidth); in Initialize()
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D | pattern.h | 55 int buswidth,
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/external/u-boot/drivers/mmc/ |
D | mxsmmc.c | 33 uint32_t buswidth; member 170 ctrl0 = priv->buswidth; in mxsmmc_send_cmd() 317 priv->buswidth = SSP_CTRL0_BUS_WIDTH_ONE_BIT; in mxsmmc_set_ios() 320 priv->buswidth = SSP_CTRL0_BUS_WIDTH_FOUR_BIT; in mxsmmc_set_ios() 323 priv->buswidth = SSP_CTRL0_BUS_WIDTH_EIGHT_BIT; in mxsmmc_set_ios() 329 SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); in mxsmmc_set_ios()
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D | ftsdc010_mci.c | 371 static void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, in ftsdc_setup_cfg() argument 379 if (buswidth == 8) { in ftsdc_setup_cfg() 397 chip->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in ftsdc010_mmc_ofdata_to_platdata() 436 chip->buswidth = dtplat->bus_width; in ftsdc010_mmc_probe() 449 ftsdc_setup_cfg(&plat->cfg, dev->name, chip->buswidth, chip->caps, in ftsdc010_mmc_probe()
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D | arm_pl180_mmci.c | 318 u32 buswidth = 0; in host_set_ios() local 322 buswidth |= SDI_CLKCR_WIDBUS_1; in host_set_ios() 325 buswidth |= SDI_CLKCR_WIDBUS_4; in host_set_ios() 328 buswidth |= SDI_CLKCR_WIDBUS_8; in host_set_ios() 335 sdi_clkcr |= buswidth; in host_set_ios()
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D | rockchip_dw_mmc.c | 59 host->buswidth = dev_read_u32_default(dev, "bus-width", 4); in rockchip_dwmmc_ofdata_to_platdata() 109 host->buswidth = dtplat->bus_width; in rockchip_dwmmc_probe()
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D | ftsdc010_mci.h | 30 int buswidth; member
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D | hi6220_dw_mmc.c | 51 host->buswidth = bus_width; in hi6220_dwmci_add_port()
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D | exynos_dw_mmc.c | 138 flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; in do_dwmci_init() 175 host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 4); in exynos_dwmci_get_config()
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D | socfpga_dw_mmc.c | 81 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), in socfpga_dwmmc_ofdata_to_platdata()
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D | dw_mmc.c | 503 if (host->buswidth == 8) {
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/external/u-boot/arch/arm/mach-keystone/ |
D | ddr3_spd.c | 137 u8 buswidth; member 186 spd->buswidth = 8 << (buf->bus_width & 0x7); in ddrtimingcalculation() 187 if ((spd->buswidth < 16) || (spd->buswidth > 64)) in ddrtimingcalculation() 372 (spd->buswidth & 3) << 12 | (spd->pagesize & 3); in init_ddr3param()
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/external/u-boot/board/synopsys/axs10x/ |
D | axs10x.c | 27 host->buswidth = 4; in board_mmc_init()
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/external/u-boot/board/synopsys/emdk/ |
D | emdk.c | 28 host->buswidth = 4; in board_mmc_init()
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/external/u-boot/include/ |
D | dwmmc.h | 160 int buswidth; member
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/external/u-boot/arch/arm/dts/ |
D | da850-lcdk.dts | 272 ti,davinci-nand-buswidth = <16>;
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/external/u-boot/board/synopsys/hsdk/ |
D | hsdk.c | 1041 host->buswidth = 4; in board_mmc_init()
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/external/u-boot/arch/arm/mach-sunxi/ |
D | Kconfig | 118 have only 16-bit memory buswidth. 124 32-bit memory buswidth.
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