Home
last modified time | relevance | path

Searched refs:gprc (Results 1 – 25 of 25) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCInstrSPE.td73 def EVLDD : EVXForm_D<769, (outs gprc:$RT), (ins spe8dis:$dst),
75 def EVLDW : EVXForm_D<771, (outs gprc:$RT), (ins spe8dis:$dst),
77 def EVLDH : EVXForm_D<773, (outs gprc:$RT), (ins spe8dis:$dst),
79 def EVLHHESPLAT : EVXForm_D<777, (outs gprc:$RT), (ins spe2dis:$dst),
81 def EVLHHOUSPLAT : EVXForm_D<781, (outs gprc:$RT), (ins spe2dis:$dst),
83 def EVLHHOSSPLAT : EVXForm_D<783, (outs gprc:$RT), (ins spe2dis:$dst),
85 def EVLWHE : EVXForm_D<785, (outs gprc:$RT), (ins spe4dis:$dst),
87 def EVLWHOU : EVXForm_D<789, (outs gprc:$RT), (ins spe4dis:$dst),
89 def EVLWHOS : EVXForm_D<791, (outs gprc:$RT), (ins spe4dis:$dst),
91 def EVLWWSPLAT : EVXForm_D<793, (outs gprc:$RT), (ins spe4dis:$dst),
[all …]
DPPCInstrInfo.td408 def gprc : RegisterOperand<GPRC> {
1073 def UPDATE_VRSAVE : Pseudo<(outs gprc:$rD), (ins gprc:$rS),
1078 def DYNALLOC : Pseudo<(outs gprc:$result), (ins gprc:$negsize, memri:$fpsi), "#DYNALLOC",
1091 def SELECT_CC_I4 : Pseudo<(outs gprc:$dst), (ins crrc:$cond,
1111 def SELECT_I4 : Pseudo<(outs gprc:$dst), (ins crbitrc:$cond,
1404 def EH_SjLj_SetJmp32 : Pseudo<(outs gprc:$dst), (ins memr:$buf),
1436 def MFBHRBE : XFXForm_3p<31, 302, (outs gprc:$rD),
1495 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_ADD_I8",
1498 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_SUB_I8",
1501 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_AND_I8",
[all …]
DPPCInstrHTM.td37 (outs crrc0:$ret), (ins gprc:$A), "tabort. $A", IIC_SprMTSPR,
44 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, gprc:$B),
49 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, u5imm:$B),
54 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, gprc:$B),
59 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, u5imm:$B),
72 (outs crrc:$ret), (ins gprc:$A), "treclaim. $A",
DPPCInstr64Bit.td345 def EH_SjLj_SetJmp64 : Pseudo<(outs gprc:$dst), (ins memr:$buf),
590 defm SLD : XForm_6r<31, 27, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
593 defm SRD : XForm_6r<31, 539, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
596 defm SRAD : XForm_6rc<31, 794, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
622 def EXTSB8_32_64 : XForm_11<31, 954, (outs g8rc:$rA), (ins gprc:$rS),
624 def EXTSH8_32_64 : XForm_11<31, 922, (outs g8rc:$rA), (ins gprc:$rS),
632 defm EXTSW_32_64 : XForm_11r<31, 986, (outs g8rc:$rA), (ins gprc:$rS),
661 def POPCNTW : XForm_11<31, 378, (outs gprc:$rA), (ins gprc:$rS),
708 (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB, u6imm:$MBE),
712 (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB, u6imm:$MBE),
[all …]
DPPCInstrAltivec.td357 def DST : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
362 def DSTT : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
367 def DSTST : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
372 def DSTSTT : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
379 def DST64 : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
384 def DSTT64 : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
389 def DSTST64 : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
395 def DSTSTT64 : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
DPPCInstrVSX.td1247 def MFVSRWZ : XX1_RS6_RD5_XO<31, 115, (outs gprc:$rA), (ins vsfrc:$XT),
1254 def MTVSRWA : XX1_RS6_RD5_XO<31, 211, (outs vsfrc:$XT), (ins gprc:$rA),
1257 def MTVSRWZ : XX1_RS6_RD5_XO<31, 243, (outs vsfrc:$XT), (ins gprc:$rA),
1263 def MTVSRWS: XX1_RS6_RD5_XO<31, 403, (outs vsrc:$XT), (ins gprc:$rA),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td486 def gprc : RegisterOperand<GPRC> {
1204 def UPDATE_VRSAVE : Pseudo<(outs gprc:$rD), (ins gprc:$rS),
1209 def DYNALLOC : Pseudo<(outs gprc:$result), (ins gprc:$negsize, memri:$fpsi), "#DYNALLOC",
1222 def SELECT_CC_I4 : Pseudo<(outs gprc:$dst), (ins crrc:$cond,
1245 def SELECT_I4 : Pseudo<(outs gprc:$dst), (ins crbitrc:$cond,
1549 def EH_SjLj_SetJmp32 : Pseudo<(outs gprc:$dst), (ins memr:$buf),
1581 def MFBHRBE : XFXForm_3p<31, 302, (outs gprc:$rD),
1654 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_ADD_I8",
1657 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_SUB_I8",
1660 (outs gprc:$dst), (ins memrr:$ptr, gprc:$incr), "#ATOMIC_LOAD_AND_I8",
[all …]
DPPCInstrHTM.td37 (outs crrc0:$ret), (ins gprc:$A), "tabort. $A", IIC_SprMTSPR,
44 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, gprc:$B),
49 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, u5imm:$B),
54 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, gprc:$B),
59 (outs crrc0:$ret), (ins u5imm:$RTS, gprc:$A, u5imm:$B),
72 (outs crrc:$ret), (ins gprc:$A), "treclaim. $A",
DPPCInstr64Bit.td352 def EH_SjLj_SetJmp64 : Pseudo<(outs gprc:$dst), (ins memr:$buf),
511 def LBZXTLS_32 : XForm_1<31, 87, (outs gprc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB),
513 def LHZXTLS_32 : XForm_1<31, 279, (outs gprc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB),
515 def LWZXTLS_32 : XForm_1<31, 23, (outs gprc:$rD), (ins ptr_rc_nor0:$rA, tlsreg:$rB),
533 def STBXTLS_32 : XForm_8<31, 215, (outs), (ins gprc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB),
536 def STHXTLS_32 : XForm_8<31, 407, (outs), (ins gprc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB),
539 def STWXTLS_32 : XForm_8<31, 151, (outs), (ins gprc:$rS, ptr_rc_nor0:$rA, tlsreg:$rB),
666 defm SLD : XForm_6r<31, 27, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
669 defm SRD : XForm_6r<31, 539, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
672 defm SRAD : XForm_6rc<31, 794, (outs g8rc:$rA), (ins g8rc:$rS, gprc:$rB),
[all …]
DPPCInstrSPE.td141 def BRINC : EVXForm_1<527, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
160 def EFDCFSI : EFXForm_2a<753, (outs sperc:$RT), (ins gprc:$RB),
164 def EFDCFSID : EFXForm_2a<739, (outs sperc:$RT), (ins gprc:$RB),
171 def EFDCFUI : EFXForm_2a<752, (outs sperc:$RT), (ins gprc:$RB),
175 def EFDCFUID : EFXForm_2a<738, (outs sperc:$RT), (ins gprc:$RB),
191 def EFDCTSI : EFXForm_2a<757, (outs gprc:$RT), (ins sperc:$RB),
195 def EFDCTSIDZ : EFXForm_2a<747, (outs gprc:$RT), (ins sperc:$RB),
199 def EFDCTSIZ : EFXForm_2a<762, (outs gprc:$RT), (ins sperc:$RB),
206 def EFDCTUI : EFXForm_2a<756, (outs gprc:$RT), (ins sperc:$RB),
210 def EFDCTUIDZ : EFXForm_2a<746, (outs gprc:$RT), (ins sperc:$RB),
[all …]
DPPCInstrAltivec.td358 def DST : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
363 def DSTT : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
368 def DSTST : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
373 def DSTSTT : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, gprc:$rA, gprc:$rB),
380 def DST64 : DSS_Form<0, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
385 def DSTT64 : DSS_Form<1, 342, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
390 def DSTST64 : DSS_Form<0, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
396 def DSTSTT64 : DSS_Form<1, 374, (outs), (ins u5imm:$STRM, g8rc:$rA, gprc:$rB),
1340 def VCLZLSBB : VXForm_RD5_XO5_RS5<1538, 0, (outs gprc:$rD), (ins vrrc:$vB),
1344 def VCTZLSBB : VXForm_RD5_XO5_RS5<1538, 1, (outs gprc:$rD), (ins vrrc:$vB),
DPPCInstrVSX.td1510 def MFVSRWZ : XX1_RS6_RD5_XO<31, 115, (outs gprc:$rA), (ins vsfrc:$XT),
1517 def MTVSRWA : XX1_RS6_RD5_XO<31, 211, (outs vsfrc:$XT), (ins gprc:$rA),
1520 def MTVSRWZ : XX1_RS6_RD5_XO<31, 243, (outs vsfrc:$XT), (ins gprc:$rA),
1526 def MTVSRWS: XX1_RS6_RD5_XO<31, 403, (outs vsrc:$XT), (ins gprc:$rA),
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dno-rlwimi-trivial-commute.mir46 - { id: 2, class: gprc }
47 - { id: 3, class: gprc }
48 - { id: 4, class: gprc }
51 - { id: 7, class: gprc }
52 - { id: 8, class: gprc }
53 - { id: 9, class: gprc }
79 ; CHECK: %[[REG1:[0-9]+]]:gprc = LI 0
80 ; CHECK: %[[REG2:[0-9]+]]:gprc = COPY %[[REG1]]
81 ; CHECK: %[[REG2]]:gprc = RLWIMI %[[REG2]], killed %2, 0, 0, 31
Dconvert-rr-to-ri-instrs-R0-special-handling.mir92 - { id: 2, class: gprc, preferred-register: '' }
93 - { id: 3, class: gprc, preferred-register: '' }
94 - { id: 4, class: gprc, preferred-register: '' }
125 %2:gprc = LI 44
126 %3:gprc = COPY %1.sub_32
127 %4:gprc = ADD4 killed $r0, killed %2
146 - { id: 2, class: gprc, preferred-register: '' }
147 - { id: 3, class: gprc, preferred-register: '' }
148 - { id: 4, class: gprc, preferred-register: '' }
179 %2:gprc = COPY %0.sub_32
[all …]
Dconvert-rr-to-ri-instrs.mir1016 - { id: 2, class: gprc, preferred-register: '' }
1017 - { id: 3, class: gprc, preferred-register: '' }
1019 - { id: 5, class: gprc, preferred-register: '' }
1130 - { id: 4, class: gprc, preferred-register: '' }
1131 - { id: 5, class: gprc, preferred-register: '' }
1132 - { id: 6, class: gprc, preferred-register: '' }
1249 - { id: 1, class: gprc, preferred-register: '' }
1250 - { id: 2, class: gprc, preferred-register: '' }
1251 - { id: 3, class: gprc, preferred-register: '' }
1311 - { id: 2, class: gprc, preferred-register: '' }
[all …]
Drlwinm_rldicl_to_andi.mir87 - { id: 3, class: gprc, preferred-register: '' }
90 - { id: 6, class: gprc, preferred-register: '' }
122 %3:gprc = LI -11
129 %6:gprc = ISEL %4, %2, %5.sub_eq
148 - { id: 4, class: gprc, preferred-register: '' }
150 - { id: 6, class: gprc, preferred-register: '' }
183 %4:gprc = RLWINMo %3, 21, 20, 31, implicit-def $cr0
189 %6:gprc = ISEL %3, %2, %5.sub_eq
208 - { id: 4, class: gprc, preferred-register: '' }
210 - { id: 6, class: gprc, preferred-register: '' }
[all …]
Dconvert-rr-to-ri-instrs-out-of-range.mir224 - { id: 1, class: gprc, preferred-register: '' }
225 - { id: 2, class: gprc, preferred-register: '' }
227 - { id: 4, class: gprc, preferred-register: '' }
327 - { id: 4, class: gprc, preferred-register: '' }
329 - { id: 6, class: gprc, preferred-register: '' }
448 - { id: 2, class: gprc, preferred-register: '' }
451 - { id: 5, class: gprc, preferred-register: '' }
454 - { id: 8, class: gprc, preferred-register: '' }
507 - { id: 4, class: gprc, preferred-register: '' }
509 - { id: 6, class: gprc, preferred-register: '' }
[all …]
Dscavenging.mir10 %0 : gprc = LI 42
18 %1 : gprc = LI 42
26 %2 : gprc = LI 42
53 %3 : gprc = LI 42
Ddebuginfo-split-int.ll29 ; CHECK: %0:gprc = COPY $r3
31 ; CHECK: %1:gprc = COPY $r4
/external/llvm/test/CodeGen/PowerPC/
Dno-rlwimi-trivial-commute.mir49 - { id: 2, class: gprc }
50 - { id: 3, class: gprc }
51 - { id: 4, class: gprc }
54 - { id: 7, class: gprc }
55 - { id: 8, class: gprc }
56 - { id: 9, class: gprc }
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/MIR/PowerPC/
Dunordered-implicit-registers.mir26 - { id: 1, class: gprc }
27 - { id: 2, class: gprc }
28 - { id: 3, class: gprc }
/external/llvm/test/CodeGen/MIR/PowerPC/
Dunordered-implicit-registers.mir27 - { id: 1, class: gprc }
28 - { id: 2, class: gprc }
29 - { id: 3, class: gprc }
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc5994 // (CMPLW CR0, gprc:$rA, gprc:$rB)
6004 // (CMPLWI CR0, gprc:$rA, u16imm:$imm)
6016 // (CMPW CR0, gprc:$rA, gprc:$rB)
6026 // (CMPWI CR0, gprc:$rA, s16imm:$imm)
6098 // (MFDCR gprc:$Rx, 128)
6107 // (MFDCR gprc:$Rx, 129)
6116 // (MFDCR gprc:$Rx, 130)
6125 // (MFDCR gprc:$Rx, 131)
6134 // (MFDCR gprc:$Rx, 132)
6143 // (MFDCR gprc:$Rx, 133)
[all …]
/external/u-boot/drivers/net/
De1000.h1000 uint64_t gprc; member
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrInfo.td2004 def gprc : SHUFBGPRCInst;