Searched refs:gtt_write (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/video/ |
| D | ivybridge_igd.c | 247 static inline void gtt_write(void *bar, u32 reg, u32 data) in gtt_write() function
255 gtt_write(bar, pm->reg, pm->value); in gtt_write_powermeter()
283 gtt_write(gtt_bar, 0xa18c, 0x00000001); in gma_pm_init_pre_vbios()
286 gtt_write(gtt_bar, 0xa180, 1 << 5); in gma_pm_init_pre_vbios()
287 gtt_write(gtt_bar, 0xa188, 0xffff0001); in gma_pm_init_pre_vbios()
295 gtt_write(gtt_bar, 0x42004, reg32); in gma_pm_init_pre_vbios()
302 gtt_write(gtt_bar, 0x45010, reg32); in gma_pm_init_pre_vbios()
344 gtt_write(gtt_bar, 0xa004, 0x00000010); in gma_pm_init_pre_vbios()
347 gtt_write(gtt_bar, 0xa000, 0x00070020); in gma_pm_init_pre_vbios()
350 gtt_write(gtt_bar, 0xa080, 0x00000004); in gma_pm_init_pre_vbios()
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| D | broadwell_igd.c | 324 static void gtt_write(struct broadwell_igd_priv *priv, unsigned long reg, in gtt_write() function
363 gtt_write(priv, PCH_PORT_HOTPLUG, reg32); in igd_setup_panel()
369 gtt_write(priv, PCH_PP_ON_DELAYS, reg32); in igd_setup_panel()
374 gtt_write(priv, PCH_PP_OFF_DELAYS, reg32); in igd_setup_panel()
381 gtt_write(priv, PCH_PP_DIVISOR, reg32); in igd_setup_panel()
386 gtt_write(priv, BLC_PWM_CPU_CTL2, BLC_PWM2_ENABLE); in igd_setup_panel()
387 gtt_write(priv, BLC_PWM_CPU_CTL, plat->cpu_backlight); in igd_setup_panel()
390 gtt_write(priv, BLC_PWM_PCH_CTL1, BLM_PCH_PWM_ENABLE); in igd_setup_panel()
391 gtt_write(priv, BLC_PWM_PCH_CTL2, plat->pch_backlight); in igd_setup_panel()
452 gtt_write(priv, 0x138128, 0x00000000); /* 450MHz */ in igd_cdclk_init_haswell()
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