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Searched refs:hasBWI (Results 1 – 16 of 16) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc45 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
51 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
60 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
63 if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
72 if ((Subtarget->hasBWI())) {
81 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
87 if ((Subtarget->hasAVX()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
96 if ((Subtarget->hasBWI()) && (Subtarget->hasVLX())) {
99 if ((Subtarget->hasAVX2()) && (!Subtarget->hasVLX() || !Subtarget->hasBWI())) {
108 if ((Subtarget->hasBWI())) {
[all …]
DX86GenGlobalISel.inc215 if (Subtarget->hasBWI())
217 if (!Subtarget->hasBWI())
223 if (!Subtarget->hasVLX() || !Subtarget->hasBWI())
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Subtarget.h637 bool hasBWI() const { return HasBWI; } in hasBWI() function
666 return hasBWI() && canExtendTo512DQ(); in canExtendTo512BW()
676 return hasBWI() && useAVX512Regs(); in useBWIRegs()
DX86TargetTransformInfo.cpp301 ST->hasBWI()) { in getArithmeticInstrCost()
467 if (ST->hasBWI()) in getArithmeticInstrCost()
894 if (ST->hasBWI()) in getShuffleCost()
1563 if (ST->hasBWI()) in getCmpSelInstrCost()
1825 if (ST->hasBWI()) in getIntrinsicInstrCost()
2599 ((DataWidth == 8 || DataWidth == 16) && ST->hasBWI()); in isLegalMaskedLoad()
2958 if (ST->hasAVX512() && isSupportedOnAVX512(VecTy, ST->hasBWI())) in getInterleavedMemoryOpCost()
DX86LegalizerInfo.cpp460 if (!(Subtarget.hasAVX512() && Subtarget.hasBWI())) in setLegalizerInfoAVX512BW()
DX86ISelLowering.cpp1416 if (!Subtarget.hasBWI()) { in X86TargetLowering()
1484 if (!Subtarget.useSoftFloat() && Subtarget.hasBWI()) { in X86TargetLowering()
1589 if (!Subtarget.useSoftFloat() && Subtarget.hasBWI()) { in X86TargetLowering()
1629 if (Subtarget.hasBWI()) { in X86TargetLowering()
1791 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI()) in getPreferredVectorAction()
1805 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI()) in getRegisterTypeForCallingConv()
1813 if (VT == MVT::v32i1 && Subtarget.hasAVX512() && !Subtarget.hasBWI()) in getNumRegistersForCallingConv()
1841 if (Subtarget.hasBWI() || EltVT.getSizeInBits() >= 32) in getSetCCResultType()
2253 assert(Subtarget.hasBWI() && "Expected AVX512BW target!"); in Passv64i1ArgInRegs()
2547 assert((Subtarget.hasBWI()) && "Expected AVX512BW target!"); in getv64i1Argument()
[all …]
DX86DomainReassignment.cpp660 if (STI->hasBWI()) { in initConverters()
DX86FrameLowering.cpp1996 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1; in assignCalleeSavedSpillSlots()
2069 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1; in spillCalleeSavedRegisters()
2150 VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1; in restoreCalleeSavedRegisters()
DX86InstrInfo.cpp2965 assert(Subtarget.hasBWI()); in CopyToFromAsymmetricReg()
2969 return Subtarget.hasBWI() ? X86::KMOVDrk : X86::KMOVWrk; in CopyToFromAsymmetricReg()
2978 assert(Subtarget.hasBWI()); in CopyToFromAsymmetricReg()
2982 return Subtarget.hasBWI() ? X86::KMOVDkr : X86::KMOVWkr; in CopyToFromAsymmetricReg()
3092 Opc = Subtarget.hasBWI() ? X86::KMOVQkk : X86::KMOVWkk; in copyPhysReg()
3161 assert(STI.hasBWI() && "KMOVD requires BWI"); in getLoadStoreRegOpcode()
3177 assert(STI.hasBWI() && "KMOVQ requires BWI"); in getLoadStoreRegOpcode()
DX86InstrInfo.td839 def HasBWI : Predicate<"Subtarget->hasBWI()">;
840 def NoBWI : Predicate<"!Subtarget->hasBWI()">;
843 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
DX86FastISel.cpp3687 (Subtarget->hasBWI() || (SVT.getScalarSizeInBits() >= 32 && in fastSelectInstruction()
/external/llvm/lib/Target/X86/
DX86Subtarget.h448 bool hasBWI() const { return HasBWI; } in hasBWI() function
DX86ISelLowering.cpp1412 if (!Subtarget.useSoftFloat() && Subtarget.hasBWI()) { in X86TargetLowering()
1719 if (Subtarget.hasBWI()) in getSetCCResultType()
1727 if (Subtarget.hasBWI() && Subtarget.hasVLX()) in getSetCCResultType()
4404 assert((Subtarget.hasBWI() || VT.getVectorNumElements() <= 16) && in getZeroVector()
7315 (Subtarget.hasBWI() && VT.is512BitVector())); in lowerVectorShuffleWithPSHUFB()
7799 assert((!VT.is512BitVector() || Subtarget.hasBWI()) && in lowerVectorShuffleAsByteRotate()
7905 unsigned MaxWidth = (VT.is512BitVector() && !Subtarget.hasBWI() ? 64 : 128); in lowerVectorShuffleAsShift()
11935 if (Subtarget.hasBWI()) in lowerV16I32VectorShuffle()
11951 assert(Subtarget.hasBWI() && "We can only lower v32i16 with AVX-512-BWI!"); in lowerV32I16VectorShuffle()
11990 assert(Subtarget.hasBWI() && "We can only lower v64i8 with AVX-512-BWI!"); in lowerV64I8VectorShuffle()
[all …]
DX86TargetTransformInfo.cpp1576 (DataWidth >= 8 && ST->hasBWI()); in isLegalMaskedLoad()
DX86InstrInfo.td809 def HasBWI : Predicate<"Subtarget->hasBWI()">,
811 def NoBWI : Predicate<"!Subtarget->hasBWI()">;
815 def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
DX86InstrInfo.cpp4424 if (Subtarget.hasBWI()) in copyPhysRegOpcode_AVX512()