/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenFastISel.inc | 139 if ((Subtarget->hasNEON())) { 148 if ((Subtarget->hasNEON())) { 157 if ((Subtarget->hasNEON())) { 166 if ((Subtarget->hasNEON())) { 175 if ((Subtarget->hasNEON())) { 184 if ((Subtarget->hasNEON())) { 193 if ((Subtarget->hasNEON())) { 202 if ((Subtarget->hasNEON())) { 227 if ((Subtarget->hasNEON())) { 236 if ((Subtarget->hasNEON())) { [all …]
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D | AArch64GenDAGISel.inc | 3373 /* 6659*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasNEON()) && (Subtarget->hasR… 3411 /* 6746*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3447 /* 6825*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasNEON()) && (Subtarget->ha… 3483 /* 6906*/ OPC_CheckPatternPredicate, 3, // (Subtarget->hasNEON()) && (Subtarget->hasR… 3506 /* 6948*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3533 /* 6995*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3552 /* 7030*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3594 /* 7108*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3609 /* 7136*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) 3634 /* 7179*/ OPC_CheckPatternPredicate, 4, // (Subtarget->hasNEON()) [all …]
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenFastISel.inc | 216 if ((Subtarget->hasNEON())) { 225 if ((Subtarget->hasNEON())) { 234 if ((Subtarget->hasNEON())) { 243 if ((Subtarget->hasNEON())) { 252 if ((Subtarget->hasNEON())) { 261 if ((Subtarget->hasNEON())) { 270 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 279 if ((Subtarget->hasFullFP16()) && (Subtarget->hasNEON())) { 288 if ((Subtarget->hasNEON())) { 297 if ((Subtarget->hasNEON())) { [all …]
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D | ARMGenDAGISel.inc | 1220 /* 2584*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1228 /* 2605*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1242 /* 2634*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1250 /* 2655*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1275 /* 2702*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1303 /* 2755*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1327 /* 2801*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1355 /* 2854*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1378 /* 2899*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) 1406 /* 2952*/ OPC_CheckPatternPredicate, 7, // (Subtarget->hasNEON()) [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.h | 82 if (ST->hasNEON()) in getNumberOfRegisters() 94 if (ST->hasNEON()) in getRegisterBitWidth()
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D | ARMTargetTransformInfo.cpp | 88 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND || in getCastInstrCost() 179 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost() 209 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost() 240 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost() 298 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { in getCmpSelInstrCost() 462 if (ST->hasNEON()) in getArithmeticInstrCost()
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D | ARMSubtarget.h | 428 bool hasNEON() const { return HasNEON; } in hasNEON() function 434 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
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D | ARMISelLowering.cpp | 464 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1013 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1264 if (Subtarget->hasNEON()) { in getRegClassFor() 4251 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN() 4608 assert(ST->hasNEON()); in LowerCTTZ() 4786 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON."); in LowerCTPOP() 4806 assert(ST->hasNEON() && "unexpected vector shift"); in LowerShift() 5209 if (!ST->hasNEON() || (!IsDouble && !ST->useNEONForSinglePrecisionFP())) in LowerConstantFP() 7927 Subtarget->hasNEON()) { in EmitStructByval() 8725 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL() [all …]
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D | A15SDOptimizer.cpp | 679 if (!(STI.isCortexA15() && STI.hasNEON())) in runOnMachineFunction()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMSubtarget.h | 202 bool hasNEON() const { return HasNEON; } in hasNEON() function 204 return hasNEON() && UseNEONForSinglePrecisionFP; } in useNEONForSinglePrecisionFP()
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D | ARMTargetMachine.cpp | 127 if (Subtarget.hasNEON()) in addPreSched2()
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D | ARMISelLowering.cpp | 444 if (Subtarget->hasNEON()) { in ARMTargetLowering() 738 if (Subtarget->hasV6T2Ops() || Subtarget->hasNEON()) in ARMTargetLowering() 740 if (Subtarget->hasNEON()) in ARMTargetLowering() 956 if (Subtarget->hasNEON()) { in getRegClassFor() 3093 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN() 3366 assert(ST->hasNEON() && "unexpected vector shift"); in LowerShift() 6443 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL() 6719 if (BVN && Subtarget->hasNEON() && in PerformORCombine() 6742 if (Subtarget->hasNEON() && N1.getOpcode() == ISD::AND && VT.isVector() && in PerformORCombine() 7432 if (!Subtarget->hasNEON() || !Op.getValueType().isVector() || in PerformVCVTCombine() [all …]
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D | ARMAsmPrinter.cpp | 711 if (Subtarget->hasNEON() && emitFPU) { in emitAttributes() 737 if (Subtarget->hasNEON()) { in emitAttributes()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64TargetTransformInfo.h | 82 if (ST->hasNEON()) in getNumberOfRegisters() 91 if (ST->hasNEON()) in getRegisterBitWidth()
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D | AArch64InstrInfo.cpp | 1874 assert(Subtarget.hasNEON() && in copyPhysRegTuple() 2035 if(Subtarget.hasNEON()) { in copyPhysReg() 2056 if(Subtarget.hasNEON()) { in copyPhysReg() 2073 if(Subtarget.hasNEON()) { in copyPhysReg() 2090 if(Subtarget.hasNEON()) { in copyPhysReg() 2111 if(Subtarget.hasNEON()) { in copyPhysReg() 2226 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2234 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2242 assert(Subtarget.hasNEON() && in storeRegToStackSlot() 2247 assert(Subtarget.hasNEON() && in storeRegToStackSlot() [all …]
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D | AArch64Subtarget.h | 176 bool hasNEON() const { return HasNEON; } in hasNEON() function
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D | AArch64ISelLowering.cpp | 81 if (Subtarget->hasNEON()) { in AArch64TargetLowering() 520 if (Subtarget->hasNEON()) { in AArch64TargetLowering() 3823 if (!Subtarget->hasNEON()) in LowerCTPOP() 4564 if (!ST.hasNEON()) in getEstimate() 7110 if (!Subtarget->hasNEON() || (VecSize != 64 && VecSize != 128)) in lowerInterleavedLoad() 7196 if (!Subtarget->hasNEON() || (SubVecSize != 64 && SubVecSize != 128)) in lowerInterleavedStore() 7432 if (!Subtarget->hasNEON() || !VT.isVector()) in foldVectorXorShiftIntoCmp() 7662 if (Subtarget->hasNEON() && ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && in performIntToFpCombine() 7688 if (!Subtarget->hasNEON()) in performFpToIntCombine() 7759 if (!Subtarget->hasNEON()) in performFDivCombine() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64TargetTransformInfo.h | 91 if (ST->hasNEON()) in getNumberOfRegisters() 100 if (ST->hasNEON()) in getRegisterBitWidth()
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D | AArch64InstrInfo.cpp | 2429 assert(Subtarget.hasNEON() && "Unexpected register copy without NEON"); in copyPhysRegTuple() 2591 if (Subtarget.hasNEON()) { in copyPhysReg() 2612 if (Subtarget.hasNEON()) { in copyPhysReg() 2629 if (Subtarget.hasNEON()) { in copyPhysReg() 2646 if (Subtarget.hasNEON()) { in copyPhysReg() 2667 if (Subtarget.hasNEON()) { in copyPhysReg() 2782 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2799 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2806 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() 2810 assert(Subtarget.hasNEON() && "Unexpected register store without NEON"); in storeRegToStackSlot() [all …]
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D | AArch64Subtarget.h | 234 bool hasNEON() const { return HasNEON; } in hasNEON() function
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.h | 122 if (ST->hasNEON()) in getNumberOfRegisters() 134 if (ST->hasNEON()) in getRegisterBitWidth()
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D | ARMTargetTransformInfo.cpp | 149 if (Src->isVectorTy() && ST->hasNEON() && (ISD == ISD::FP_ROUND || in getCastInstrCost() 240 if (SrcTy.isVector() && ST->hasNEON()) { in getCastInstrCost() 270 if (SrcTy.isFloatingPoint() && ST->hasNEON()) { in getCastInstrCost() 301 if (SrcTy.isInteger() && ST->hasNEON()) { in getCastInstrCost() 359 if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { in getCmpSelInstrCost() 507 if (ST->hasNEON()) in getArithmeticInstrCost()
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D | ARMSubtarget.h | 556 bool hasNEON() const { return HasNEON; } in hasNEON() function 566 return hasNEON() && UseNEONForSinglePrecisionFP; in useNEONForSinglePrecisionFP()
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D | A15SDOptimizer.cpp | 663 if (!(STI.useSplatVFPToNeon() && STI.hasNEON())) in runOnMachineFunction()
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D | ARMISelLowering.cpp | 550 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1136 if (Subtarget->hasNEON()) { in ARMTargetLowering() 1407 if (Subtarget->hasNEON()) { in getRegClassFor() 4924 bool UseNEON = !InGPR && Subtarget->hasNEON(); in LowerFCOPYSIGN() 5365 assert(ST->hasNEON()); in LowerCTTZ() 5543 assert(ST->hasNEON() && "Custom ctpop lowering requires NEON."); in LowerCTPOP() 5563 assert(ST->hasNEON() && "unexpected vector shift"); in LowerShift() 6017 if (!ST->hasNEON() || (!IsDouble && !ST->useNEONForSinglePrecisionFP())) in LowerConstantFP() 8933 Subtarget->hasNEON()) { in EmitStructByval() 9886 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineBUILD_VECTORToVPADDL() [all …]
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