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Searched refs:is128BitVector (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DValueTypes.h153 bool is128BitVector() const { in is128BitVector() function
154 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
DMachineValueType.h248 bool is128BitVector() const { in is128BitVector() function
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DValueTypes.h182 bool is128BitVector() const { in is128BitVector() function
183 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h98 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
DAArch64TargetTransformInfo.cpp626 LT.second.is128BitVector() && Alignment < 16) { in getMemoryOpCost()
DAArch64ISelLowering.cpp2441 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
2557 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
2628 assert(VT.is128BitVector() && VT.isInteger() && in LowerMULH()
3022 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
7354 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
9539 if (!VT.is128BitVector()) { in performAddSubLongCombine()
DAArch64FastISel.cpp2952 VT.is128BitVector()) in fastLowerArguments()
2998 } else if (VT.is128BitVector()) { in fastLowerArguments()
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h98 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
DAArch64ISelLowering.cpp2113 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in addRequiredExtensionForVectorMULL()
2215 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
2519 else if (RegVT == MVT::f128 || RegVT.is128BitVector()) in LowerFormalArguments()
6545 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
8374 if (!VT.is128BitVector()) { in performAddSubLongCombine()
DAArch64FastISel.cpp2866 VT.is128BitVector()) in fastLowerArguments()
2912 } else if (VT.is128BitVector()) { in fastLowerArguments()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DValueTypes.h493 bool is128BitVector() const { in is128BitVector() function
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp2625 else if (RegVT.is128BitVector()) in LowerFormalArguments()
3116 else if (RegVT.is128BitVector()) { in LowerCall()
4393 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector() || in getZeroVector()
4401 if (!Subtarget.hasSSE2() && VT.is128BitVector()) { in getZeroVector()
4499 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in insert128BitVector()
4681 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && in getOnesVector()
4699 assert(VT.is128BitVector() && "Expected a 128-bit vector type"); in getUnpackl()
4712 assert(VT.is128BitVector() && "Expected a 128-bit vector type"); in getUnpackh()
5389 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
5473 assert(VT.is128BitVector() && "Unknown type for VShift"); in getVShift()
[all …]
DX86FastISel.cpp3461 if (!SrcVT.is128BitVector() && in fastSelectInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp3088 else if (RegVT.is128BitVector()) in LowerFormalArguments()
3612 else if (RegVT.is128BitVector()) { in LowerCall()
5078 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector() || in getZeroVector()
5086 if (!Subtarget.hasSSE2() && VT.is128BitVector()) { in getZeroVector()
5176 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in insert128BitVector()
5402 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && in getOnesVector()
5416 if (VT.is128BitVector() && InVT.is128BitVector()) in getExtendInVec()
6611 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
6694 assert(VT.is128BitVector() && "Unknown type for VShift"); in getVShift()
6917 ((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()))) { in EltsFromConsecutiveLoads()
[all …]
DX86ISelDAGToDAG.cpp479 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp671 if (!Ty.is128BitVector()) in performORCombine()
987 if (Ty.is128BitVector() && Ty.isInteger()) { in performVSELECTCombine()
1044 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2303 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2355 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2876 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
DMipsSEISelDAGToDAG.cpp909 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DMachineValueType.h351 bool is128BitVector() const { in is128BitVector() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp601 if (!Ty.is128BitVector()) in performORCombine()
993 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2395 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2447 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2967 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
DMipsSEISelDAGToDAG.cpp1025 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp3252 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
3941 DAG, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
3952 DAG, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
4188 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
4472 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
4625 assert(VT.is128BitVector() && "unexpected type for custom-lowering ISD::MUL"); in LowerMUL()
6626 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
6689 DAG, VbicVT, VT.is128BitVector(), in PerformANDCombine()
6725 DAG, VorrVT, VT.is128BitVector(), in PerformORCombine()
6758 EVT CanonicalVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in PerformORCombine()
DARMISelDAGToDAG.cpp2360 if (!VT.is128BitVector() || N->getNumOperands() != 2) in SelectConcatVector()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp5253 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
6473 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
6484 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
6629 if (VT.is128BitVector() && VT != MVT::v2f64 && VT != MVT::v4f32) { in LowerBUILD_VECTOR()
6890 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
7240 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
7358 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
7473 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
9849 !N0.getValueType().is128BitVector()) in AddCombineVUZPToVPADDL()
10608 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
[all …]
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp4510 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
5662 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5673 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
6065 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
6416 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
6534 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
6639 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
9149 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
9243 DAG, dl, VbicVT, VT.is128BitVector(), in PerformANDCombine()
9285 DAG, dl, VorrVT, VT.is128BitVector(), in PerformORCombine()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.cpp857 if (!VT.is128BitVector()) in X86TargetLowering()
885 if (!VT.is128BitVector()) in X86TargetLowering()
1061 if (VT.is128BitVector()) in X86TargetLowering()
3512 assert((VT.is128BitVector() || VT.is256BitVector()) && in isUNPCKLMask()
3561 assert((VT.is128BitVector() || VT.is256BitVector()) && in isUNPCKHMask()
4328 assert((VT.is128BitVector() || VT.is256BitVector()) in getOnesVector()
5418 if (ResVT.is128BitVector()) in LowerCONCAT_VECTORS()

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