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Searched refs:mfc1 (Results 1 – 25 of 174) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dhf16call32_body.ll25 ; stel: mfc1 $4, $f12
46 ; stel: mfc1 $4, $f12
47 ; stel: mfc1 $5, $f13
70 ; stel: mfc1 $4, $f12
71 ; stel: mfc1 $5, $f14
94 ; stel: mfc1 $4, $f12
95 ; stel: mfc1 $6, $f14
96 ; stel: mfc1 $7, $f15
119 ; stel: mfc1 $4, $f12
120 ; stel: mfc1 $5, $f13
[all …]
Dfcmp.ll49 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
53 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
62 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
82 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
86 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
95 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
115 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
119 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
128 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
148 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
[all …]
Do32_cc.ll143 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
144 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
146 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
160 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
161 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
163 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
220 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
221 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
223 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
282 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
[all …]
Dmno-ldc1-sdc1.ll151 ; 32R1-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
152 ; 32R1-LE-PIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
156 ; 32R2-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
161 ; 32R6-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
166 ; 32R1-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
167 ; 32R1-LE-STATIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
173 ; 32R2-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
180 ; 32R6-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
187 ; 32R1-BE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
188 ; 32R1-BE-PIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
[all …]
Dbuildpairextractelementf64.ll27 ; NO-MFHC1: mfc1
28 ; NO-MFHC1: mfc1
30 ; HAS-MFHC1-DAG: mfc1
Dfpbr.ll19 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
55 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
86 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
117 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
149 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
180 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
Dhf16call32.ll825 ; stel: mfc1 $2, $f0
835 ; stel: mfc1 $2, $f0
846 ; stel: mfc1 $2, $f0
857 ; stel: mfc1 $2, $f0
869 ; stel: mfc1 $2, $f0
881 ; stel: mfc1 $2, $f0
894 ; stel: mfc1 $2, $f0
903 ; stel: mfc1 $2, $f0
904 ; stel: mfc1 $3, $f1
914 ; stel: mfc1 $2, $f0
[all …]
Dselect.ll461 ; 32R6-NEXT: mfc1 $1, $f0
483 ; 64R6-NEXT: mfc1 $1, $f0
517 ; 32R6-NEXT: mfc1 $1, $f0
539 ; 64R6-NEXT: mfc1 $1, $f0
573 ; 32R6-NEXT: mfc1 $1, $f0
595 ; 64R6-NEXT: mfc1 $1, $f0
629 ; 32R6-NEXT: mfc1 $1, $f0
651 ; 64R6-NEXT: mfc1 $1, $f0
740 ; 32R6-NEXT: mfc1 $1, $f0
764 ; 64R6-NEXT: mfc1 $1, $f0
[all …]
Do32_cc_byval.ll119 ; CHECK-NEXT: mfc1 $6, $f0
122 ; CHECK-NEXT: mfc1 $7, $f1
169 ; CHECK-NEXT: mfc1 $6, $f0
172 ; CHECK-NEXT: mfc1 $7, $f1
210 ; CHECK-NEXT: mfc1 $6, $f0
213 ; CHECK-NEXT: mfc1 $7, $f1
/external/llvm/test/CodeGen/Mips/
Dhf16call32_body.ll25 ; stel: mfc1 $4, $f12
46 ; stel: mfc1 $4, $f12
47 ; stel: mfc1 $5, $f13
70 ; stel: mfc1 $4, $f12
71 ; stel: mfc1 $5, $f14
94 ; stel: mfc1 $4, $f12
95 ; stel: mfc1 $6, $f14
96 ; stel: mfc1 $7, $f15
119 ; stel: mfc1 $4, $f12
120 ; stel: mfc1 $5, $f13
[all …]
Dfcmp.ll51 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
55 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
65 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
85 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
89 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
99 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
119 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
123 ; 64-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
133 ; MMR6-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
153 ; 32-CMP-DAG: mfc1 $[[T1:[0-9]+]], $[[T0]]
[all …]
Do32_cc.ll143 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
144 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
146 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
160 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
161 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
163 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
220 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
221 ; NO-MFHC1-DAG: mfc1 $7, $f{{[0-9]+}}
223 ; HAS-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
282 ; NO-MFHC1-DAG: mfc1 $6, $f{{[0-9]+}}
[all …]
Dmno-ldc1-sdc1.ll151 ; 32R1-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
152 ; 32R1-LE-PIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
156 ; 32R2-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
161 ; 32R6-LE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
166 ; 32R1-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
167 ; 32R1-LE-STATIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
173 ; 32R2-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
180 ; 32R6-LE-STATIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
187 ; 32R1-BE-PIC-DAG: mfc1 $[[R0:[0-9]+]], $f12
188 ; 32R1-BE-PIC-DAG: mfc1 $[[R1:[0-9]+]], $f13
[all …]
Dbuildpairextractelementf64.ll27 ; NO-MFHC1: mfc1
28 ; NO-MFHC1: mfc1
30 ; HAS-MFHC1-DAG: mfc1
Dfpbr.ll18 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
53 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
83 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
113 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
144 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
174 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]]
Dhf16call32.ll825 ; stel: mfc1 $2, $f0
835 ; stel: mfc1 $2, $f0
846 ; stel: mfc1 $2, $f0
857 ; stel: mfc1 $2, $f0
869 ; stel: mfc1 $2, $f0
881 ; stel: mfc1 $2, $f0
894 ; stel: mfc1 $2, $f0
903 ; stel: mfc1 $2, $f0
904 ; stel: mfc1 $3, $f1
914 ; stel: mfc1 $2, $f0
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dfcopysign.ll9 ; CHECK-EL: mfc1 $[[HI0:[0-9]+]], $f13
11 ; CHECK-EL: mfc1 $[[HI1:[0-9]+]], $f15
15 ; CHECK-EL: mfc1 $[[LO0:[0-9]+]], $f12
22 ; CHECK-EB: mfc1 $[[HI0:[0-9]+]], $f12
24 ; CHECK-EB: mfc1 $[[HI1:[0-9]+]], $f14
29 ; CHECK-EB: mfc1 $[[LO0:[0-9]+]], $f13
43 ; CHECK-EL: mfc1 $[[ARG0:[0-9]+]], $f12
45 ; CHECK-EL: mfc1 $[[ARG1:[0-9]+]], $f14
Dbuildpairextractelementf64.ll16 ; CHECK: mfc1
17 ; CHECK: mfc1
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dfp.call_ret.ll62 ; MIPS32: mfc1 a2,$f{{[0-9]+}}
63 ; MIPS32: mfc1 a3,$f{{[0-9]+}}
66 ; MIPS32: mfc1 a2,$f{{[0-9]+}}
67 ; MIPS32: mfc1 a3,$f{{[0-9]+}}
70 ; MIPS32: mfc1 a2,$f{{[0-9]+}}
71 ; MIPS32: mfc1 a3,$f{{[0-9]+}}
86 ; MIPS32: mfc1 a2,$f{{[0-9]+}}
87 ; MIPS32: mfc1 a3,$f{{[0-9]+}}
101 ; MIPS32: mfc1 a2,$f0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
Df16-llvm-ir.ll98 ; MIPS32: mfc1 $[[R2:[0-9]+]], $f[[F1]]
132 ; ALL: mfc1 $[[R2:[0-9]]], $f[[F2]]
147 ; ALL: mfc1 $[[R4:[0-9]+]], $f[[F4]]
159 ; ALL: mfc1 $[[R7:[0-9]]], $f[[F6]]
181 ; MIPSR6: mfc1 $[[R10:[0-9]+]], $f[[F1]]
210 ; ALL: mfc1 $2, $f[[F1]]
231 ; MIPS32: mfc1 $[[R0:[0-9]+]], $f[[F2]]
278 ; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
314 ; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
344 ; ALL: mfc1 $[[R2:[0-9]+]], $f[[F1]]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-dbl.ll231 ; 32R6-NEXT: mfc1 $1, $f0
257 ; 64R6-NEXT: mfc1 $1, $f0
272 ; MM32R6-NEXT: mfc1 $1, $f0
311 ; 32R6-NEXT: mfc1 $1, $f0
337 ; 64R6-NEXT: mfc1 $1, $f0
352 ; MM32R6-NEXT: mfc1 $1, $f0
391 ; 32R6-NEXT: mfc1 $1, $f0
417 ; 64R6-NEXT: mfc1 $1, $f0
432 ; MM32R6-NEXT: mfc1 $1, $f0
471 ; 32R6-NEXT: mfc1 $1, $f0
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/
Dfpintconv.ll20 ; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
32 ; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
Dcallabi.ll416 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
436 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
437 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
454 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
476 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
478 ; ALL-DAG: mfc1 $7, $f[[REGF1_3]]
499 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
500 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
519 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dfpintconv.ll20 ; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
32 ; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]]
Dcallabi.ll427 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
447 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
448 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
465 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]
488 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
489 ; ALL-DAG: mfc1 $7, $f[[REGF1_3]]
511 ; ALL-DAG: mfc1 $5, $f[[REGF0_3]]
512 ; ALL-DAG: mfc1 $6, $f[[REGF1_3]]
530 ; ALL-DAG: mfc1 $5, $f[[REGF_3]]

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