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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/X86/
Dx86-movmsk.ll22 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
25 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
32 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
35 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
52 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
55 %1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
62 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
65 %1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
89 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
98 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
[all …]
/external/llvm/test/Transforms/InstCombine/
Dx86-movmsk.ll22 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
25 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
32 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
35 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
52 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
55 %1 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0)
62 ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
65 %1 = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0)
89 %1 = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0)
98 %1 = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0)
[all …]
/external/llvm/test/CodeGen/X86/
Davx512-mask-bugfix.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) #0
23 %v0.i.i.i70 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
31 %v1.i5.i.i116 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %mask0) #0
Dpr17631.ll6 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
15 %A2 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %A1)
Dmovmsk.ll126 %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
141 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
148 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
149 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-win64.ll27 %v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
44 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
D2011-11-22-AVX2-Domains.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
85 …%v.i20550 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i20549) nounwind read…
Dfp-logic.ll252 define float @movmsk(float %x) {
253 ; CHECK-LABEL: movmsk:
Dsse-intrinsics-x86.ll340 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
343 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-intrinsics-x86.ll544 %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; <i32> [#uses=1]
547 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
2644 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
2647 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
3753 %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; <i32> [#uses=1]
3756 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone
3770 %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; <i32> [#uses=1]
3773 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
Dsse2-intrinsics-x86.ll432 %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; <i32> [#uses=1]
435 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dmovmsk.ll89 %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
102 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
109 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
110 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-intrinsics-x86.ll311 %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; <i32> [#uses=1]
314 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
1558 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
1561 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
2132 %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; <i32> [#uses=1]
2135 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone
2140 %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; <i32> [#uses=1]
2143 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpr17631.ll6 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
15 %A2 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %A1)
Dmovmsk.ll126 %0 = tail call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %x) nounwind
141 %1 = tail call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %0) nounwind
148 declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone
149 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
Davx-win64.ll27 %v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
44 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
D2011-11-22-AVX2-Domains.ll8 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
85 …%v.i20550 = tail call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i20549) nounwind read…
Dfp-logic.ll231 define float @movmsk(float %x) {
232 ; CHECK-LABEL: movmsk:
Davx-intrinsics-x86.ll512 %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; <i32> [#uses=1]
515 declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone
524 %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; <i32> [#uses=1]
527 declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
Dsse-intrinsics-x86.ll380 %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; <i32> [#uses=1]
383 declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone
/external/swiftshader/src/Reactor/
DSubzeroReactor.cpp2879 auto movmsk = Ice::InstIntrinsicCall::create(::function, 1, result, target, intrinsic); in SignMask() local
2880 movmsk->addArg(x.value); in SignMask()
2881 ::basicBlock->appendInst(movmsk); in SignMask()
3155 auto movmsk = Ice::InstIntrinsicCall::create(::function, 1, result, target, intrinsic); in SignMask() local
3156 movmsk->addArg(x.value); in SignMask()
3157 ::basicBlock->appendInst(movmsk); in SignMask()
6039 auto movmsk = Ice::InstIntrinsicCall::create(::function, 1, result, target, intrinsic); in SignMask() local
6040 movmsk->addArg(x.value); in SignMask()
6041 ::basicBlock->appendInst(movmsk); in SignMask()
7014 auto movmsk = Ice::InstIntrinsicCall::create(::function, 1, result, target, intrinsic); in SignMask() local
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen168 x86_avx_movmsk_pd_256, // llvm.x86.avx.movmsk.pd.256
169 x86_avx_movmsk_ps_256, // llvm.x86.avx.movmsk.ps.256
327 x86_sse2_movmsk_pd, // llvm.x86.sse2.movmsk.pd
492 x86_sse_movmsk_ps, // llvm.x86.sse.movmsk.ps
695 "llvm.x86.avx.movmsk.pd.256",
696 "llvm.x86.avx.movmsk.ps.256",
854 "llvm.x86.sse2.movmsk.pd",
1019 "llvm.x86.sse.movmsk.ps",
3436 return Intrinsic::x86_sse_movmsk_ps; // "86.sse.movmsk.ps"
4003 return Intrinsic::x86_sse2_movmsk_pd; // "86.sse2.movmsk.pd"
[all …]
/external/swiftshader/third_party/subzero/src/
DIceAssemblerX86Base.h488 void movmsk(Type Ty, GPRRegister dst, XmmRegister src);
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DDataMov.cpp989 TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ in TEST_F()
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DDataMov.cpp1376 TestMovmskGPRXmm(GPR, Src, (-1.0, 1.0, -1.0, 1.0), 0x05ul, movmsk); \ in TEST_F()

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