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Searched refs:qpu (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/broadcom/compiler/
Dvir.c30 switch (inst->qpu.type) { in vir_get_non_sideband_nsrc()
34 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) in vir_get_non_sideband_nsrc()
35 return v3d_qpu_add_op_num_src(inst->qpu.alu.add.op); in vir_get_non_sideband_nsrc()
37 return v3d_qpu_mul_op_num_src(inst->qpu.alu.mul.op); in vir_get_non_sideband_nsrc()
57 switch (inst->qpu.type) { in vir_has_implicit_uniform()
87 switch (inst->qpu.type) { in vir_has_side_effects()
91 switch (inst->qpu.alu.add.op) { in vir_has_side_effects()
104 switch (inst->qpu.alu.mul.op) { in vir_has_side_effects()
112 if (inst->qpu.sig.ldtmu || in vir_has_side_effects()
113 inst->qpu.sig.ldvary || in vir_has_side_effects()
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Dvir_to_qpu.c100 ldunif->qpu.sig.ldunif = true; in new_ldunif_instr()
211 temp->qpu.sig.ldvpm = true; in v3d_generate_code_block()
259 if (qinst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) { in v3d_generate_code_block()
261 &qinst->qpu.sig)) { in v3d_generate_code_block()
262 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP); in v3d_generate_code_block()
263 assert(qinst->qpu.alu.mul.op == V3D_QPU_M_NOP); in v3d_generate_code_block()
265 qinst->qpu.sig_addr = dst.index; in v3d_generate_code_block()
266 qinst->qpu.sig_magic = dst.magic; in v3d_generate_code_block()
267 } else if (qinst->qpu.alu.add.op != V3D_QPU_A_NOP) { in v3d_generate_code_block()
268 assert(qinst->qpu.alu.mul.op == V3D_QPU_M_NOP); in v3d_generate_code_block()
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Dvir_opt_copy_propagate.c43 if (inst->qpu.type != V3D_QPU_INSTR_TYPE_ALU || in is_copy_mov()
44 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV && in is_copy_mov()
45 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) { in is_copy_mov()
57 if (inst->qpu.alu.add.output_pack != V3D_QPU_PACK_NONE || in is_copy_mov()
58 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) { in is_copy_mov()
62 if (inst->qpu.flags.ac != V3D_QPU_COND_NONE || in is_copy_mov()
63 inst->qpu.flags.mc != V3D_QPU_COND_NONE) { in is_copy_mov()
109 return inst->qpu.alu.add.a_unpack != V3D_QPU_UNPACK_NONE; in vir_has_unpack()
111 return inst->qpu.alu.add.b_unpack != V3D_QPU_UNPACK_NONE; in vir_has_unpack()
114 return inst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE; in vir_has_unpack()
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Dvir_opt_dead_code.c50 assert(inst->qpu.flags.apf == V3D_QPU_PF_NONE); in dce()
51 assert(inst->qpu.flags.mpf == V3D_QPU_PF_NONE); in dce()
52 assert(inst->qpu.flags.auf == V3D_QPU_UF_NONE); in dce()
53 assert(inst->qpu.flags.muf == V3D_QPU_UF_NONE); in dce()
112 if (inst->qpu.flags.apf != V3D_QPU_PF_NONE || in vir_opt_dead_code()
113 inst->qpu.flags.mpf != V3D_QPU_PF_NONE || in vir_opt_dead_code()
114 inst->qpu.flags.auf != V3D_QPU_UF_NONE || in vir_opt_dead_code()
115 inst->qpu.flags.muf != V3D_QPU_UF_NONE || in vir_opt_dead_code()
Dvir_dump.c169 struct v3d_qpu_sig *sig = &inst->qpu.sig; in vir_dump_sig()
175 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
181 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
185 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
189 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
195 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
201 vir_dump_sig_addr(c->devinfo, &inst->qpu); in vir_dump_sig()
210 struct v3d_qpu_instr *instr = &inst->qpu; in vir_dump_alu()
215 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) { in vir_dump_alu()
254 struct v3d_qpu_instr *instr = &inst->qpu; in vir_dump_inst()
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Dvir_live_variables.c98 if (inst->qpu.type != V3D_QPU_INSTR_TYPE_ALU) in vir_setup_def()
127 if (((inst->qpu.flags.ac == V3D_QPU_COND_NONE && in vir_setup_def()
128 inst->qpu.flags.mc == V3D_QPU_COND_NONE) || in vir_setup_def()
130 inst->qpu.alu.add.output_pack == V3D_QPU_PACK_NONE && in vir_setup_def()
131 inst->qpu.alu.mul.output_pack == V3D_QPU_PACK_NONE) { in vir_setup_def()
158 if (inst->qpu.flags.ac == V3D_QPU_COND_NONE && in vir_setup_def()
159 inst->qpu.flags.mc == V3D_QPU_COND_NONE) { in vir_setup_def()
190 (state->insts[i]->qpu.flags.ac != V3D_QPU_COND_NONE || in sf_state_clear()
191 state->insts[i]->qpu.flags.mc != V3D_QPU_COND_NONE)) in sf_state_clear()
Dqpu_schedule.c179 add_read_dep(state, state->last_rf[n->inst->qpu.raddr_a], n); in process_mux_deps()
182 add_read_dep(state, state->last_rf[n->inst->qpu.raddr_b], n); in process_mux_deps()
282 struct v3d_qpu_instr *inst = &qinst->qpu; in calculate_deps()
508 const struct v3d_qpu_instr *inst = &qinst->qpu; in reads_too_soon_after_write()
548 const struct v3d_qpu_instr *inst = &qinst->qpu; in writes_too_soon_after_write()
741 if (prev_inst->inst->qpu.sig.thrsw) in choose_instruction_to_schedule()
746 const struct v3d_qpu_instr *inst = &n->inst->qpu; in choose_instruction_to_schedule()
809 &prev_inst->inst->qpu, inst)) { in choose_instruction_to_schedule()
894 v3d_qpu_dump(devinfo, &n->inst->qpu); in dump_state()
903 v3d_qpu_dump(devinfo, &child->inst->qpu); in dump_state()
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Dvir_register_allocate.c177 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) { in v3d_register_allocate()
178 switch (inst->qpu.alu.add.op) { in v3d_register_allocate()
207 assert(inst->qpu.alu.mul.op == V3D_QPU_M_MOV); in v3d_register_allocate()
217 if (inst->qpu.sig.thrsw) { in v3d_register_allocate()
Dqpu_validate.c57 v3d_qpu_dump(c->devinfo, &inst->qpu); in fail_instr()
105 const struct v3d_qpu_instr *inst = &qinst->qpu; in qpu_validate_inst()
239 state->last = &qinst->qpu; in qpu_validate_block()
Dv3d_compiler.h130 struct v3d_qpu_instr qpu; member
910 ldtmu->qpu.sig.ldtmu = true; in vir_LDTMU()
914 vir_NOP(c)->qpu.sig.ldtmu = true; in vir_LDTMU()
Dv3d40_tex.c43 inst->qpu.sig.wrtmuc = true; in vir_WRTMUC()
Dnir_to_vir.c72 c->last_thrsw->qpu.sig.thrsw = true; in vir_emit_thrsw()
405 ldvary->qpu.sig.ldvary = true; in emit_fragment_varying()
408 vir_NOP(c)->qpu.sig.ldvary = true; in emit_fragment_varying()
1787 branch->qpu.branch.msfign = V3D_QPU_MSFIGN_P; in ntq_emit_loop()
1920 if (inst->qpu.sig.thrsw) in vir_remove_thrsw()
/external/mesa3d/src/broadcom/
DMakefile.sources41 qpu/qpu_disasm.c \
42 qpu/qpu_disasm.h \
43 qpu/qpu_instr.c \
44 qpu/qpu_instr.h \
45 qpu/qpu_pack.c \
D.gitignore3 qpu/tests/qpu_disasm
DMakefile.vc5.am19 qpu/tests/qpu_disasm \
DMakefile.am54 qpu/meson.build
Dmeson.build29 subdir('qpu') subdir
/external/honggfuzz/examples/apache-httpd/corpus_http1/
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/external/honggfuzz/examples/apache-httpd/corpus_http2/
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