Home
last modified time | relevance | path

Searched refs:rctx (Results 1 – 25 of 51) sorted by relevance

123

/external/mesa3d/src/gallium/drivers/r600/
Dr600_state_common.c52 void r600_add_atom(struct r600_context *rctx, in r600_add_atom() argument
57 assert(rctx->atoms[id] == NULL); in r600_add_atom()
58 rctx->atoms[id] = atom; in r600_add_atom()
62 void r600_init_atom(struct r600_context *rctx, in r600_init_atom() argument
70 r600_add_atom(rctx, atom, id); in r600_init_atom()
73 void r600_emit_cso_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_cso_state() argument
75 r600_emit_command_buffer(rctx->b.gfx.cs, ((struct r600_cso_state*)atom)->cb); in r600_emit_cso_state()
78 void r600_emit_alphatest_state(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_alphatest_state() argument
80 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_alphatest_state()
84 if (rctx->b.chip_class >= EVERGREEN && a->cb0_export_16bpc) { in r600_emit_alphatest_state()
[all …]
Dr600_streamout.c37 static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable);
45 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_create_so_target() local
54 u_suballocator_alloc(rctx->allocator_zeroed_memory, 4, 4, in r600_create_so_target()
82 void r600_streamout_buffers_dirty(struct r600_common_context *rctx) in r600_streamout_buffers_dirty() argument
84 struct r600_atom *begin = &rctx->streamout.begin_atom; in r600_streamout_buffers_dirty()
85 unsigned num_bufs = util_bitcount(rctx->streamout.enabled_mask); in r600_streamout_buffers_dirty()
86 unsigned num_bufs_appended = util_bitcount(rctx->streamout.enabled_mask & in r600_streamout_buffers_dirty()
87 rctx->streamout.append_bitmask); in r600_streamout_buffers_dirty()
92 rctx->streamout.num_dw_for_end = in r600_streamout_buffers_dirty()
100 if (rctx->family >= CHIP_RS780 && rctx->family <= CHIP_RV740) in r600_streamout_buffers_dirty()
[all …]
Dr600_viewport.c51 #define GET_MAX_SCISSOR(rctx) (rctx->chip_class >= EVERGREEN ? 16384 : 8192) argument
58 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_set_scissor_states() local
62 rctx->scissors.states[start_slot + i] = state[i]; in r600_set_scissor_states()
64 if (!rctx->scissor_enabled) in r600_set_scissor_states()
67 rctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot; in r600_set_scissor_states()
68 rctx->set_atom_dirty(rctx, &rctx->scissors.atom, true); in r600_set_scissor_states()
74 static void r600_get_scissor_from_viewport(struct r600_common_context *rctx, in r600_get_scissor_from_viewport() argument
89 scissor->maxx = scissor->maxy = GET_MAX_SCISSOR(rctx); in r600_get_scissor_from_viewport()
112 static void r600_clamp_scissor(struct r600_common_context *rctx, in r600_clamp_scissor() argument
116 unsigned max_scissor = GET_MAX_SCISSOR(rctx); in r600_clamp_scissor()
[all …]
Dr600_pipe.c67 struct r600_context *rctx = (struct r600_context *)context; in r600_destroy_context() local
70 r600_isa_destroy(rctx->isa); in r600_destroy_context()
72 r600_sb_context_destroy(rctx->sb_context); in r600_destroy_context()
74 r600_resource_reference(&rctx->dummy_cmask, NULL); in r600_destroy_context()
75 r600_resource_reference(&rctx->dummy_fmask, NULL); in r600_destroy_context()
77 if (rctx->append_fence) in r600_destroy_context()
78 pipe_resource_reference((struct pipe_resource**)&rctx->append_fence, NULL); in r600_destroy_context()
80 rctx->b.b.set_constant_buffer(&rctx->b.b, sh, R600_BUFFER_INFO_CONST_BUFFER, NULL); in r600_destroy_context()
81 free(rctx->driver_consts[sh].constants); in r600_destroy_context()
84 if (rctx->fixed_func_tcs_shader) in r600_destroy_context()
[all …]
Dr600_blit.c55 struct r600_context *rctx = (struct r600_context *)ctx; in r600_blitter_begin() local
57 if (rctx->cmd_buf_is_compute) { in r600_blitter_begin()
58 rctx->b.gfx.flush(rctx, PIPE_FLUSH_ASYNC, NULL); in r600_blitter_begin()
59 rctx->cmd_buf_is_compute = false; in r600_blitter_begin()
62 util_blitter_save_vertex_buffer_slot(rctx->blitter, rctx->vertex_buffer_state.vb); in r600_blitter_begin()
63 util_blitter_save_vertex_elements(rctx->blitter, rctx->vertex_fetch_shader.cso); in r600_blitter_begin()
64 util_blitter_save_vertex_shader(rctx->blitter, rctx->vs_shader); in r600_blitter_begin()
65 util_blitter_save_geometry_shader(rctx->blitter, rctx->gs_shader); in r600_blitter_begin()
66 util_blitter_save_tessctrl_shader(rctx->blitter, rctx->tcs_shader); in r600_blitter_begin()
67 util_blitter_save_tesseval_shader(rctx->blitter, rctx->tes_shader); in r600_blitter_begin()
[all …]
Dr600_pipe_common.c158 struct r600_common_context *rctx = in r600_draw_rectangle() local
165 rctx->b.bind_vertex_elements_state(&rctx->b, vertex_elements_cso); in r600_draw_rectangle()
166 rctx->b.bind_vs_state(&rctx->b, get_vs(blitter)); in r600_draw_rectangle()
179 rctx->b.set_viewport_states(&rctx->b, 0, 1, &viewport); in r600_draw_rectangle()
184 u_upload_alloc(rctx->b.stream_uploader, 0, sizeof(float) * 24, in r600_draw_rectangle()
185 rctx->screen->info.tcc_cache_line_size, in r600_draw_rectangle()
232 rctx->b.set_vertex_buffers(&rctx->b, blitter->vb_slot, 1, &vbuffer); in r600_draw_rectangle()
233 util_draw_arrays_instanced(&rctx->b, R600_PRIM_RECTANGLE_LIST, 0, 3, in r600_draw_rectangle()
238 static void r600_dma_emit_wait_idle(struct r600_common_context *rctx) in r600_dma_emit_wait_idle() argument
240 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_dma_emit_wait_idle()
[all …]
Devergreen_compute.c108 struct r600_context *rctx = NULL; in evergreen_set_rat() local
114 rctx = pipe->ctx; in evergreen_set_rat()
116 COMPUTE_DBG(rctx->screen, "bind rat: %i \n", id); in evergreen_set_rat()
141 evergreen_init_color_surface_rat(rctx, surf); in evergreen_set_rat()
144 static void evergreen_cs_set_vertex_buffer(struct r600_context *rctx, in evergreen_cs_set_vertex_buffer() argument
149 struct r600_vertexbuf_state *state = &rctx->cs_vertex_buffer_state; in evergreen_cs_set_vertex_buffer()
158 rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; in evergreen_cs_set_vertex_buffer()
161 r600_mark_atom_dirty(rctx, &state->atom); in evergreen_cs_set_vertex_buffer()
164 static void evergreen_cs_set_constant_buffer(struct r600_context *rctx, in evergreen_cs_set_constant_buffer() argument
176 rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_COMPUTE, cb_index, &cb); in evergreen_cs_set_constant_buffer()
[all …]
Dr600_state.c246 static void r600_emit_polygon_offset(struct r600_context *rctx, struct r600_atom *a) in r600_emit_polygon_offset() argument
248 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_emit_polygon_offset()
317 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_blend_state_mode() local
329 if (rctx->b.family > CHIP_R600) in r600_create_blend_state_mode()
386 if (rctx->b.family > CHIP_R600) { in r600_create_blend_state_mode()
458 struct r600_context *rctx = (struct r600_context *)ctx; in r600_create_rs_state() local
484 if (rctx->b.chip_class == R700) { in r600_create_rs_state()
508 S_028A4C_PS_ITER_SAMPLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
509 if (rctx->b.family == CHIP_RV770) { in r600_create_rs_state()
511 sc_mode_cntl |= S_028A4C_TILE_COVER_DISABLE(state->multisample && rctx->ps_iter_samples > 1); in r600_create_rs_state()
[all …]
Devergreen_state.c470 struct r600_context *rctx = (struct r600_context *)ctx; in evergreen_create_rs_state() local
543 if (rctx->b.chip_class == CAYMAN) { in evergreen_create_rs_state()
620 static void evergreen_fill_buffer_resource_words(struct r600_context *rctx, in evergreen_fill_buffer_resource_words() argument
667 texture_buffer_sampler_view(struct r600_context *rctx, in texture_buffer_sampler_view() argument
684 evergreen_fill_buffer_resource_words(rctx, view->base.texture, in texture_buffer_sampler_view()
690 LIST_ADDTAIL(&view->list, &rctx->texture_buffers); in texture_buffer_sampler_view()
707 static int evergreen_fill_tex_resource_words(struct r600_context *rctx, in evergreen_fill_tex_resource_words() argument
713 struct r600_screen *rscreen = (struct r600_screen*)rctx->b.b.screen; in evergreen_fill_tex_resource_words()
756 format = r600_translate_texformat(rctx->b.b.screen, params->pipe_format, in evergreen_fill_tex_resource_words()
901 struct r600_context *rctx = (struct r600_context*)ctx; in evergreen_create_sampler_view_custom() local
[all …]
Dr600_query.c92 static bool r600_query_sw_begin(struct r600_common_context *rctx, in r600_query_sw_begin() argument
103 query->begin_result = rctx->num_draw_calls; in r600_query_sw_begin()
106 query->begin_result = rctx->num_decompress_calls; in r600_query_sw_begin()
109 query->begin_result = rctx->num_mrt_draw_calls; in r600_query_sw_begin()
112 query->begin_result = rctx->num_prim_restart_calls; in r600_query_sw_begin()
115 query->begin_result = rctx->num_spill_draw_calls; in r600_query_sw_begin()
118 query->begin_result = rctx->num_compute_calls; in r600_query_sw_begin()
121 query->begin_result = rctx->num_spill_compute_calls; in r600_query_sw_begin()
124 query->begin_result = rctx->num_dma_calls; in r600_query_sw_begin()
127 query->begin_result = rctx->num_cp_dma_calls; in r600_query_sw_begin()
[all …]
Dr600_hw_context.c89 void r600_flush_emit(struct r600_context *rctx) in r600_flush_emit() argument
91 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in r600_flush_emit()
95 if (!rctx->b.flags) { in r600_flush_emit()
100 if (rctx->b.flags & R600_CONTEXT_STREAMOUT_FLUSH) in r600_flush_emit()
101 rctx->b.flags |= r600_get_flush_flags(R600_COHERENCY_SHADER); in r600_flush_emit()
103 if (rctx->b.flags & R600_CONTEXT_WAIT_3D_IDLE) { in r600_flush_emit()
106 if (rctx->b.flags & R600_CONTEXT_WAIT_CP_DMA_IDLE) { in r600_flush_emit()
112 if (rctx->b.family >= CHIP_CAYMAN) { in r600_flush_emit()
114 rctx->b.flags |= R600_CONTEXT_PS_PARTIAL_FLUSH; in r600_flush_emit()
121 if (rctx->b.flags & R600_CONTEXT_PS_PARTIAL_FLUSH) { in r600_flush_emit()
[all …]
Devergreen_hw_context.c31 void evergreen_dma_copy_buffer(struct r600_context *rctx, in evergreen_dma_copy_buffer() argument
38 struct radeon_winsys_cs *cs = rctx->b.dma.cs; in evergreen_dma_copy_buffer()
63 r600_need_dma_space(&rctx->b, ncopy * 5, rdst, rsrc); in evergreen_dma_copy_buffer()
67 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rsrc, RADEON_USAGE_READ, in evergreen_dma_copy_buffer()
69 radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, rdst, RADEON_USAGE_WRITE, in evergreen_dma_copy_buffer()
85 void evergreen_cp_dma_clear_buffer(struct r600_context *rctx, in evergreen_cp_dma_clear_buffer() argument
90 struct radeon_winsys_cs *cs = rctx->b.gfx.cs; in evergreen_cp_dma_clear_buffer()
93 assert(rctx->screen->b.has_cp_dma); in evergreen_cp_dma_clear_buffer()
104 rctx->b.flags |= r600_get_flush_flags(coher) | in evergreen_cp_dma_clear_buffer()
112 r600_need_cs_space(rctx, in evergreen_cp_dma_clear_buffer()
[all …]
Dr600_pipe.h614 static inline void r600_set_atom_dirty(struct r600_context *rctx, in r600_set_atom_dirty() argument
624 rctx->dirty_atoms |= mask; in r600_set_atom_dirty()
626 rctx->dirty_atoms &= ~mask; in r600_set_atom_dirty()
629 static inline void r600_mark_atom_dirty(struct r600_context *rctx, in r600_mark_atom_dirty() argument
632 r600_set_atom_dirty(rctx, atom, true); in r600_mark_atom_dirty()
635 static inline void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom) in r600_emit_atom() argument
637 atom->emit(&rctx->b, atom); in r600_emit_atom()
638 r600_set_atom_dirty(rctx, atom, false); in r600_emit_atom()
641 static inline void r600_set_cso_state(struct r600_context *rctx, in r600_set_cso_state() argument
645 r600_set_atom_dirty(rctx, &state->atom, cso != NULL); in r600_set_cso_state()
[all …]
Dr600_buffer_common.c246 r600_invalidate_buffer(struct r600_common_context *rctx, in r600_invalidate_buffer() argument
264 if (r600_rings_is_buffer_referenced(rctx, rbuffer->buf, RADEON_USAGE_READWRITE) || in r600_invalidate_buffer()
265 !rctx->ws->buffer_wait(rbuffer->buf, 0, RADEON_USAGE_READWRITE)) { in r600_invalidate_buffer()
266 rctx->invalidate_buffer(&rctx->b, &rbuffer->b.b); in r600_invalidate_buffer()
279 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_replace_buffer_storage() local
295 rctx->rebind_buffer(ctx, dst, old_gpu_address); in r600_replace_buffer_storage()
301 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_invalidate_resource() local
306 (void)r600_invalidate_buffer(rctx, rbuffer); in r600_invalidate_resource()
317 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_buffer_get_transfer() local
321 transfer = slab_alloc(&rctx->pool_transfers_unsync); in r600_buffer_get_transfer()
[all …]
Dr600_cs.h69 static inline unsigned radeon_add_to_buffer_list(struct r600_common_context *rctx, in radeon_add_to_buffer_list() argument
76 return rctx->ws->cs_add_buffer( in radeon_add_to_buffer_list()
100 radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx, in radeon_add_to_buffer_list_check_mem() argument
108 !radeon_cs_memory_below_limit(rctx->screen, ring->cs, in radeon_add_to_buffer_list_check_mem()
109 rctx->vram + rbo->vram_usage, in radeon_add_to_buffer_list_check_mem()
110 rctx->gtt + rbo->gart_usage)) in radeon_add_to_buffer_list_check_mem()
111 ring->flush(rctx, PIPE_FLUSH_ASYNC, NULL); in radeon_add_to_buffer_list_check_mem()
113 return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority); in radeon_add_to_buffer_list_check_mem()
116 static inline void r600_emit_reloc(struct r600_common_context *rctx, in r600_emit_reloc() argument
122 bool has_vm = ((struct r600_common_screen*)rctx->b.screen)->info.has_virtual_memory; in r600_emit_reloc()
[all …]
Dr600_pipe_common.h695 bool r600_common_context_init(struct r600_common_context *rctx,
698 void r600_common_context_cleanup(struct r600_common_context *rctx);
713 bool r600_check_device_reset(struct r600_common_context *rctx);
726 void r600_query_init(struct r600_common_context *rctx);
732 void r600_streamout_buffers_dirty(struct r600_common_context *rctx);
737 void r600_emit_streamout_end(struct r600_common_context *rctx);
738 void r600_update_prims_generated_query_state(struct r600_common_context *rctx,
740 void r600_streamout_init(struct r600_common_context *rctx);
746 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx,
773 void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
[all …]
Deg_debug.c323 static void eg_dump_last_ib(struct r600_context *rctx, FILE *f) in eg_dump_last_ib() argument
327 if (!rctx->last_gfx.ib) in eg_dump_last_ib()
330 if (rctx->last_trace_buf) { in eg_dump_last_ib()
335 uint32_t *map = rctx->b.ws->buffer_map(rctx->last_trace_buf->buf, in eg_dump_last_ib()
343 eg_parse_ib(f, rctx->last_gfx.ib, rctx->last_gfx.num_dw, in eg_dump_last_ib()
344 last_trace_id, "IB", rctx->b.chip_class, in eg_dump_last_ib()
352 struct r600_context *rctx = (struct r600_context*)ctx; in eg_dump_debug_state() local
354 eg_dump_last_ib(rctx, f); in eg_dump_debug_state()
359 radeon_clear_saved_cs(&rctx->last_gfx); in eg_dump_debug_state()
360 r600_resource_reference(&rctx->last_trace_buf, NULL); in eg_dump_debug_state()
Dr600_texture.c46 bool r600_prepare_for_dma_blit(struct r600_common_context *rctx, in r600_prepare_for_dma_blit() argument
54 if (!rctx->dma.cs) in r600_prepare_for_dma_blit()
85 r600_texture_discard_cmask(rctx->screen, rdst); in r600_prepare_for_dma_blit()
90 rctx->b.flush_resource(&rctx->b, &rsrc->resource.b.b); in r600_prepare_for_dma_blit()
135 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_to_staging_texture() local
146 rctx->dma_copy(ctx, dst, 0, 0, 0, 0, src, transfer->level, in r600_copy_to_staging_texture()
153 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_from_staging_texture() local
168 rctx->dma_copy(ctx, dst, transfer->level, in r600_copy_from_staging_texture()
317 static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx, in r600_eliminate_fast_color_clear() argument
320 struct r600_common_screen *rscreen = rctx->screen; in r600_eliminate_fast_color_clear()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_pipe_common.c158 static void r600_dma_emit_wait_idle(struct r600_common_context *rctx) in r600_dma_emit_wait_idle() argument
160 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_dma_emit_wait_idle()
163 if (rctx->chip_class >= CIK) in r600_dma_emit_wait_idle()
246 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in r600_flush_dma_ring() local
247 struct radeon_winsys_cs *cs = rctx->dma.cs; in r600_flush_dma_ring()
250 (rctx->screen->debug_flags & DBG(CHECK_VM)) && in r600_flush_dma_ring()
251 rctx->check_vm_faults; in r600_flush_dma_ring()
255 rctx->ws->fence_reference(fence, rctx->last_sdma_fence); in r600_flush_dma_ring()
260 si_save_cs(rctx->ws, cs, &saved, true); in r600_flush_dma_ring()
262 rctx->ws->cs_flush(cs, flags, &rctx->last_sdma_fence); in r600_flush_dma_ring()
[all …]
Dr600_query.c94 static bool r600_query_sw_begin(struct r600_common_context *rctx, in r600_query_sw_begin() argument
105 query->begin_result = rctx->num_draw_calls; in r600_query_sw_begin()
108 query->begin_result = rctx->num_decompress_calls; in r600_query_sw_begin()
111 query->begin_result = rctx->num_mrt_draw_calls; in r600_query_sw_begin()
114 query->begin_result = rctx->num_prim_restart_calls; in r600_query_sw_begin()
117 query->begin_result = rctx->num_spill_draw_calls; in r600_query_sw_begin()
120 query->begin_result = rctx->num_compute_calls; in r600_query_sw_begin()
123 query->begin_result = rctx->num_spill_compute_calls; in r600_query_sw_begin()
126 query->begin_result = rctx->num_dma_calls; in r600_query_sw_begin()
129 query->begin_result = rctx->num_cp_dma_calls; in r600_query_sw_begin()
[all …]
Dr600_texture.c46 bool si_prepare_for_dma_blit(struct r600_common_context *rctx, in si_prepare_for_dma_blit() argument
54 if (!rctx->dma.cs) in si_prepare_for_dma_blit()
93 r600_texture_discard_cmask(rctx->screen, rdst); in si_prepare_for_dma_blit()
98 rctx->b.flush_resource(&rctx->b, &rsrc->resource.b.b); in si_prepare_for_dma_blit()
143 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_to_staging_texture() local
154 rctx->dma_copy(ctx, dst, 0, 0, 0, 0, src, transfer->level, in r600_copy_to_staging_texture()
161 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_copy_from_staging_texture() local
176 rctx->dma_copy(ctx, dst, transfer->level, in r600_copy_from_staging_texture()
385 static void r600_eliminate_fast_color_clear(struct r600_common_context *rctx, in r600_eliminate_fast_color_clear() argument
388 struct si_screen *sscreen = rctx->screen; in r600_eliminate_fast_color_clear()
[all …]
Dr600_buffer_common.c249 r600_invalidate_buffer(struct r600_common_context *rctx, in r600_invalidate_buffer() argument
267 if (si_rings_is_buffer_referenced(rctx, rbuffer->buf, RADEON_USAGE_READWRITE) || in r600_invalidate_buffer()
268 !rctx->ws->buffer_wait(rbuffer->buf, 0, RADEON_USAGE_READWRITE)) { in r600_invalidate_buffer()
269 rctx->invalidate_buffer(&rctx->b, &rbuffer->b.b); in r600_invalidate_buffer()
282 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in si_replace_buffer_storage() local
300 rctx->rebind_buffer(ctx, dst, old_gpu_address); in si_replace_buffer_storage()
306 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in si_invalidate_resource() local
311 (void)r600_invalidate_buffer(rctx, rbuffer); in si_invalidate_resource()
322 struct r600_common_context *rctx = (struct r600_common_context*)ctx; in r600_buffer_get_transfer() local
326 transfer = slab_alloc(&rctx->pool_transfers_unsync); in r600_buffer_get_transfer()
[all …]
/external/boringssl/src/crypto/evp/
Dp_rsa.c101 RSA_PKEY_CTX *rctx; in pkey_rsa_init() local
102 rctx = OPENSSL_malloc(sizeof(RSA_PKEY_CTX)); in pkey_rsa_init()
103 if (!rctx) { in pkey_rsa_init()
106 OPENSSL_memset(rctx, 0, sizeof(RSA_PKEY_CTX)); in pkey_rsa_init()
108 rctx->nbits = 2048; in pkey_rsa_init()
109 rctx->pad_mode = RSA_PKCS1_PADDING; in pkey_rsa_init()
110 rctx->saltlen = -2; in pkey_rsa_init()
112 ctx->data = rctx; in pkey_rsa_init()
148 RSA_PKEY_CTX *rctx = ctx->data; in pkey_rsa_cleanup() local
150 if (rctx == NULL) { in pkey_rsa_cleanup()
[all …]
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_fence.c56 static void si_add_fence_dependency(struct r600_common_context *rctx, in si_add_fence_dependency() argument
59 struct radeon_winsys *ws = rctx->ws; in si_add_fence_dependency()
61 if (rctx->dma.cs) in si_add_fence_dependency()
62 ws->cs_add_fence_dependency(rctx->dma.cs, fence); in si_add_fence_dependency()
63 ws->cs_add_fence_dependency(rctx->gfx.cs, fence); in si_add_fence_dependency()
112 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in si_fence_server_sync() local
119 rfence->gfx_unflushed.ctx == rctx) in si_fence_server_sync()
128 si_add_fence_dependency(rctx, rfence->sdma); in si_fence_server_sync()
130 si_add_fence_dependency(rctx, rfence->gfx); in si_fence_server_sync()
377 struct r600_common_context *rctx = (struct r600_common_context *)ctx; in si_flush_from_st() local
[all …]
Dsi_state_draw.c847 static void si_emit_surface_sync(struct r600_common_context *rctx, in si_emit_surface_sync() argument
850 struct radeon_winsys_cs *cs = rctx->gfx.cs; in si_emit_surface_sync()
852 if (rctx->chip_class >= GFX9) { in si_emit_surface_sync()
873 struct r600_common_context *rctx = &sctx->b; in si_emit_cache_flush() local
874 struct radeon_winsys_cs *cs = rctx->gfx.cs; in si_emit_cache_flush()
876 uint32_t flush_cb_db = rctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB | in si_emit_cache_flush()
879 if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_CB) in si_emit_cache_flush()
881 if (rctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) in si_emit_cache_flush()
892 if (rctx->flags & SI_CONTEXT_INV_ICACHE) in si_emit_cache_flush()
894 if (rctx->flags & SI_CONTEXT_INV_SMEM_L1) in si_emit_cache_flush()
[all …]

123