Searched refs:seh (Results 1 – 25 of 277) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | win64_eh_leaf.ll | 13 ; ASM: .seh
25 ; A Win64 "leaf" function gets no .seh directives in the asm.
27 ; ASM-NOT: .seh
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| D | seh-filter-no-personality.ll | 3 ; Mostly make sure that llvm.x86.seh.recoverfp doesn't crash if the parent
7 declare i8* @llvm.x86.seh.recoverfp(i8*, i8*)
17 %parentfp = tail call i8* @llvm.x86.seh.recoverfp(i8* bitcast (i32 ()* @main to i8*), i8* %ebp)
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| D | seh-stack-realign.ll | 15 declare i8* @llvm.x86.seh.recoverfp(i8*, i8*)
41 %parentfp = tail call i8* @llvm.x86.seh.recoverfp(i8* bitcast (i32 ()* @main to i8*), i8* %ebp)
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| /external/llvm/test/CodeGen/X86/ |
| D | seh-filter-no-personality.ll | 3 ; Mostly make sure that llvm.x86.seh.recoverfp doesn't crash if the parent
7 declare i8* @llvm.x86.seh.recoverfp(i8*, i8*)
17 %parentfp = tail call i8* @llvm.x86.seh.recoverfp(i8* bitcast (i32 ()* @main to i8*), i8* %ebp)
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| D | seh-stack-realign.ll | 15 declare i8* @llvm.x86.seh.recoverfp(i8*, i8*)
41 %parentfp = tail call i8* @llvm.x86.seh.recoverfp(i8* bitcast (i32 ()* @main to i8*), i8* %ebp)
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/ |
| D | inst-family-set-clr-flag.s | 29 seh label
83 ; CHECK: seh ; encoding: [0x58,0x94]
84 ; CHECK: seh ; encoding: [0x58,0x94]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/ |
| D | callabi.ll | 33 ; 32R2: seh $4, $[[T0]]
82 ; 32R2-DAG: seh $4, $[[T0]]
83 ; 32R2-DAG: seh $5, $[[T1]]
140 ; 32R2-DAG: seh $4, $[[T0]]
141 ; 32R2-DAG: seh $5, $[[T1]]
142 ; 32R2-DAG: seh $6, $[[T2]]
198 ; 32R2: seh $4, $[[R]]
202 ; 32R2: seh $5, $[[R]]
206 ; 32R2: seh $6, $[[R]]
210 ; 32R2: seh $7, $[[R]]
[all …]
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| D | sel1.ll | 38 ; FIXME: The seh $X, $zero and xor .., .., $x instructions are redundant.
42 ; CHECK-NEXT: seh $1, $4
43 ; CHECK-NEXT: seh $2, $zero
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| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| D | callabi.ll | 33 ; 32R2: seh $4, $[[T0]]
82 ; 32R2-DAG: seh $4, $[[T0]]
83 ; 32R2-DAG: seh $5, $[[T1]]
140 ; 32R2-DAG: seh $4, $[[T0]]
141 ; 32R2-DAG: seh $5, $[[T1]]
142 ; 32R2-DAG: seh $6, $[[T2]]
220 ; 32R2-DAG: seh $[[T4:[0-9]+]], $[[T0]]
223 ; 32R2-DAG: seh $5, $[[T1]]
224 ; 32R2-DAG: seh $6, $[[T2]]
226 ; 32R2: seh $7, $[[T5]]
[all …]
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| D | sel1.ll | 40 ; CHECK-DAG: seh $[[T0:[0-9]+]], $4
42 ; CHECK-DAG: seh $[[T1:[0-9]+]], $zero
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| /external/icu/icu4c/source/data/lang/ |
| D | seh.txt | 3 seh{
38 seh{"sena"}
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| /external/llvm/test/CodeGen/WinEH/ |
| D | wineh-setjmp.ll | 15 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
23 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
33 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WinEH/ |
| D | wineh-setjmp.ll | 15 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
23 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
33 ; CHECK: %[[lsda:.*]] = call i8* @llvm.x86.seh.lsda(i8* bitcast (i32 ()* @test1 to i8*))
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| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | add.ll | 81 ; R2-R6: seh $2, $[[T0]]
84 ; MMR6: seh $2, $[[T0]]
216 ; R2-R6: seh $2, $[[T0]]
219 ; MM32: seh $2, $[[T0]]
222 ; MM64: seh $2, $[[T0]]
350 ; R2-R6: seh $2, $[[T0]]
353 ; MMR6: seh $2, $[[T0]]
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| D | mul.ll | 125 ; 32R2-R5: seh $2, $[[T0]]
128 ; 32R6: seh $2, $[[T0]]
140 ; 64R2: seh $2, $[[T0]]
143 ; 64R6: seh $2, $[[T0]]
146 ; MM32: seh $2, $[[T0]]
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| D | srem.ll | 111 ; R2-R5: seh $2, $[[T0]]
115 ; R6: seh $2, $[[T0]]
120 ; MMR3: seh $2, $[[T0]]
124 ; MMR6: seh $2, $[[T0]]
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| D | sdiv.ll | 118 ; R2-R5: seh $2, $[[T0]]
123 ; R6: seh $2, $[[T0]]
128 ; MMR3: seh $2, $[[T0]]
132 ; MMR6: seh $2, $[[T0]]
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| D | urem.ll | 133 ; R2-R5: seh $2, $[[T2]]
139 ; R6: seh $2, $[[T2]]
146 ; MMR3: seh $2, $[[T2]]
152 ; MMR6: seh $2, $[[T2]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | mul.ll | 124 ; 32R2-R5: seh $2, $[[T0]]
127 ; 32R6: seh $2, $[[T0]]
139 ; 64R2: seh $2, $[[T0]]
142 ; 64R6: seh $2, $[[T0]]
145 ; MM32: seh $2, $[[T0]]
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| D | srem.ll | 111 ; R2-R5: seh $2, $[[T0]]
115 ; R6: seh $2, $[[T0]]
120 ; MMR3: seh $2, $[[T0]]
124 ; MMR6: seh $2, $[[T0]]
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| D | sdiv.ll | 118 ; R2-R5: seh $2, $[[T0]]
123 ; R6: seh $2, $[[T0]]
128 ; MMR3: seh $2, $[[T0]]
132 ; MMR6: seh $2, $[[T0]]
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| D | urem.ll | 131 ; R2-R5: seh $2, $[[T2]]
137 ; R6: seh $2, $[[T2]]
144 ; MMR3: seh $2, $[[T2]]
150 ; MMR6: seh $2, $[[T2]]
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| /external/icu/icu4c/source/data/unit/ |
| D | seh.txt | 3 seh{
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| /external/icu/icu4c/source/data/zone/ |
| D | seh.txt | 3 seh{
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Instrumentation/SanitizerCoverage/ |
| D | seh.ll | 10 declare i8* @llvm.x86.seh.recoverfp(i8*, i8*)
58 %1 = tail call i8* @llvm.x86.seh.recoverfp(i8* bitcast (i32 ()* @main to i8*), i8* %0)
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