Searched refs:src0_abs (Results 1 – 16 of 16) sorted by relevance
| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_disasm.c | 55 uint32_t src0_abs : 1; member
549 .abs = instr->src0_abs, in print_instr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrFormats.td | 123 bits<1> src0_abs;
130 let Word1{0} = src0_abs;
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| D | R600Instructions.td | 97 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
102 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
139 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
145 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
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| D | R600ExpandSpecialInstrs.cpp | 340 SetFlagInNewMI(NewMI, &MI, AMDGPU::OpName::src0_abs); in runOnMachineFunction()
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| D | VIInstrFormats.td | 201 let Inst{53} = src0_modifiers{1}; // src0_abs
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| D | R600InstrInfo.cpp | 1324 OPERAND_CASE(AMDGPU::OpName::src0_abs) in getSlotedOps()
1364 AMDGPU::OpName::src0_abs, in buildSlotOfVectorInstruction()
1468 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src0_abs); in getFlagOp()
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| D | EvergreenInstructions.td | 406 let src0_abs = 0;
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| D | R600ISelLowering.cpp | 2392 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0_abs), in PostISelFolding()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrFormats.td | 133 bits<1> src0_abs;
140 let Word1{0} = src0_abs;
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| D | R600ExpandSpecialInstrs.cpp | 277 SetFlagInNewMI(NewMI, &MI, R600::OpName::src0_abs); in runOnMachineFunction()
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| D | R600Instructions.td | 108 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
113 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
150 R600_Reg32:$src0, NEG:$src0_neg, REL:$src0_rel, ABS:$src0_abs, SEL:$src0_sel,
156 "$src0_neg$src0_abs$src0$src0_abs$src0_rel, "
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| D | R600InstrInfo.cpp | 1303 OPERAND_CASE(R600::OpName::src0_abs) in getSlotedOps()
1343 R600::OpName::src0_abs, in buildSlotOfVectorInstruction()
1443 FlagIndex = getOperandIdx(MI, R600::OpName::src0_abs); in getFlagOp()
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| D | VOPInstructions.td | 501 let Inst{53} = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
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| D | EvergreenInstructions.td | 480 let src0_abs = 0;
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| D | R600ISelLowering.cpp | 2279 TII->getOperandIdx(Opcode, R600::OpName::src0_abs), in PostISelFolding()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_inst.h | 149 F(src0_abs, 77, 77)
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