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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dmachine-outliner-bad-register.mir48 liveins: $w8, $wzr
49 $w8 = ORRWri $wzr, 1
50 $w8 = ORRWri $wzr, 2
51 $w8 = ORRWri $wzr, 3
52 $w8 = ORRWri $wzr, 4
56 liveins: $w8, $wzr
57 $w8 = ORRWri $wzr, 1
58 $w8 = ORRWri $wzr, 2
59 $w8 = ORRWri $wzr, 3
60 $w8 = ORRWri $wzr, 4
[all …]
Dmachine-outliner-default.mir21 liveins: $w8, $wzr
22 $w8 = ORRWri $wzr, 1
23 $w8 = ORRWri $wzr, 2
24 $w8 = ORRWri $wzr, 3
25 $w8 = ORRWri $wzr, 4
36 liveins: $w8, $wzr
37 $w8 = ORRWri $wzr, 1
38 $w8 = ORRWri $wzr, 2
39 $w8 = ORRWri $wzr, 3
40 $w8 = ORRWri $wzr, 4
[all …]
Dunfold-masked-merge-scalar-variablemask.ll9 ; CHECK-NEXT: and w8, w0, w2
11 ; CHECK-NEXT: orr w0, w8, w9
23 ; CHECK-NEXT: and w8, w0, w2
25 ; CHECK-NEXT: orr w0, w8, w9
37 ; CHECK-NEXT: and w8, w0, w2
39 ; CHECK-NEXT: orr w0, w8, w9
68 ; CHECK-NEXT: and w8, w0, w2
70 ; CHECK-NEXT: orr w0, w8, w9
81 ; CHECK-NEXT: and w8, w0, w2
83 ; CHECK-NEXT: orr w0, w8, w9
[all …]
Dunfold-masked-merge-scalar-constmask-interleavedbits.ll12 ; CHECK-NEXT: mov w8, #85
14 ; CHECK-NEXT: and w8, w0, w8
16 ; CHECK-NEXT: orr w0, w8, w9
27 ; CHECK-NEXT: mov w8, #21845
29 ; CHECK-NEXT: and w8, w0, w8
31 ; CHECK-NEXT: orr w0, w8, w9
42 ; CHECK-NEXT: and w8, w0, #0x55555555
44 ; CHECK-NEXT: orr w0, w8, w9
72 ; CHECK-NEXT: eor w8, w0, w1
74 ; CHECK-NEXT: and w8, w8, w9
[all …]
Dlack-of-signed-truncation-check.ll24 ; CHECK-NEXT: sxtb w8, w0
25 ; CHECK-NEXT: and w8, w8, #0xffff
26 ; CHECK-NEXT: cmp w8, w0, uxth
38 ; CHECK-NEXT: sxth w8, w0
39 ; CHECK-NEXT: cmp w8, w0
51 ; CHECK-NEXT: sxtb w8, w0
52 ; CHECK-NEXT: cmp w8, w0
107 ; CHECK-NEXT: sub w8, w0, #128 // =128
108 ; CHECK-NEXT: ubfx w8, w8, #8, #8
109 ; CHECK-NEXT: cmp w8, #255 // =255
[all …]
Dsigned-truncation-check.ll24 ; CHECK-NEXT: sxtb w8, w0
25 ; CHECK-NEXT: and w8, w8, #0xffff
26 ; CHECK-NEXT: cmp w8, w0, uxth
38 ; CHECK-NEXT: sxth w8, w0
39 ; CHECK-NEXT: cmp w8, w0
51 ; CHECK-NEXT: sxtb w8, w0
52 ; CHECK-NEXT: cmp w8, w0
107 ; CHECK-NEXT: sub w8, w0, #128 // =128
108 ; CHECK-NEXT: ubfx w8, w8, #8, #8
109 ; CHECK-NEXT: cmp w8, #254 // =254
[all …]
Dunfold-masked-merge-scalar-constmask-innerouter.ll12 ; CHECK-NEXT: lsr w8, w0, #2
13 ; CHECK-NEXT: bfi w1, w8, #2, #4
25 ; CHECK-NEXT: lsr w8, w0, #4
26 ; CHECK-NEXT: bfi w1, w8, #4, #8
38 ; CHECK-NEXT: lsr w8, w0, #8
39 ; CHECK-NEXT: bfi w1, w8, #8, #16
68 ; CHECK-NEXT: eor w8, w0, w1
69 ; CHECK-NEXT: and w8, w8, #0x3c
70 ; CHECK-NEXT: eor w0, w8, w1
81 ; CHECK-NEXT: eor w8, w0, w1
[all …]
Dunfold-masked-merge-scalar-constmask-interleavedbytehalves.ll24 ; CHECK-NEXT: mov w8, #3855
26 ; CHECK-NEXT: and w8, w0, w8
28 ; CHECK-NEXT: orr w0, w8, w9
39 ; CHECK-NEXT: and w8, w0, #0xf0f0f0f
41 ; CHECK-NEXT: orr w0, w8, w9
69 ; CHECK-NEXT: eor w8, w0, w1
70 ; CHECK-NEXT: and w8, w8, #0xf
71 ; CHECK-NEXT: eor w0, w8, w1
82 ; CHECK-NEXT: eor w8, w0, w1
84 ; CHECK-NEXT: and w8, w8, w9
[all …]
Dunfold-masked-merge-scalar-constmask-lowhigh.ll64 ; CHECK-NEXT: eor w8, w0, w1
65 ; CHECK-NEXT: and w8, w8, #0xf
66 ; CHECK-NEXT: eor w0, w8, w1
77 ; CHECK-NEXT: eor w8, w0, w1
78 ; CHECK-NEXT: and w8, w8, #0xff
79 ; CHECK-NEXT: eor w0, w8, w1
90 ; CHECK-NEXT: eor w8, w0, w1
91 ; CHECK-NEXT: and w8, w8, #0xffff
92 ; CHECK-NEXT: eor w0, w8, w1
103 ; CHECK-NEXT: eor w8, w0, w1
[all …]
Dextract-lowbits.ll24 ; CHECK-NEXT: orr w8, wzr, #0x1
25 ; CHECK-NEXT: lsl w8, w8, w1
26 ; CHECK-NEXT: sub w8, w8, #1 // =1
27 ; CHECK-NEXT: and w0, w8, w0
38 ; CHECK-NEXT: orr w8, wzr, #0x1
39 ; CHECK-NEXT: lsl w8, w8, w1
40 ; CHECK-NEXT: sub w8, w8, #1 // =1
41 ; CHECK-NEXT: and w0, w8, w0
53 ; CHECK-NEXT: ldr w8, [x0]
57 ; CHECK-NEXT: and w0, w9, w8
[all …]
Dsignbit-shift.ll9 ; CHECK-NEXT: mvn w8, w0
10 ; CHECK-NEXT: lsr w0, w8, #31
20 ; CHECK-NEXT: asr w8, w0, #31
21 ; CHECK-NEXT: add w0, w8, #42 // =42
47 ; CHECK-NEXT: mov w8, #41
48 ; CHECK-NEXT: cinc w0, w8, ge
58 ; CHECK-NEXT: mvn w8, w0
59 ; CHECK-NEXT: asr w0, w8, #31
69 ; CHECK-NEXT: lsr w8, w0, #31
70 ; CHECK-NEXT: add w0, w8, #41 // =41
[all …]
Dsdivpow2.ll8 ; CHECK-NEXT: add w8, w0, #7 // =7
10 ; CHECK-NEXT: csel w8, w8, w0, lt
11 ; CHECK-NEXT: asr w0, w8, #3
20 ; CHECK-NEXT: add w8, w0, #7 // =7
22 ; CHECK-NEXT: csel w8, w8, w0, lt
23 ; CHECK-NEXT: neg w0, w8, asr #3
32 ; CHECK-NEXT: add w8, w0, #31 // =31
34 ; CHECK-NEXT: csel w8, w8, w0, lt
35 ; CHECK-NEXT: asr w0, w8, #5
Dmachine-outliner.ll84 ; CHECK: orr w8, wzr, #0x1
85 ; CHECK-NEXT: str w8, [sp, #28]
86 ; CHECK-NEXT: orr w8, wzr, #0x2
87 ; CHECK-NEXT: str w8, [sp, #24]
88 ; CHECK-NEXT: orr w8, wzr, #0x3
89 ; CHECK-NEXT: str w8, [sp, #20]
90 ; CHECK-NEXT: orr w8, wzr, #0x4
91 ; CHECK-NEXT: str w8, [sp, #16]
92 ; CHECK-NEXT: mov w8, #5
93 ; CHECK-NEXT: str w8, [sp, #12]
[all …]
Dfast-isel-folded-shift.ll7 ; CHECK: and [[REG:w[0-9]+]], w0, w8
16 ; CHECK: and [[REG:w[0-9]+]], w0, w8
25 ; CHECK: and w0, w0, w8
42 ; CHECK: orr [[REG:w[0-9]+]], w0, w8
51 ; CHECK: orr [[REG:w[0-9]+]], w0, w8
60 ; CHECK: orr w0, w0, w8
77 ; CHECK: eor [[REG:w[0-9]+]], w0, w8
86 ; CHECK: eor [[REG:w[0-9]+]], w0, w8
95 ; CHECK: eor w0, w0, w8
112 ; CHECK: add w0, w0, w8
Dfast-isel-sdiv.ll17 ; CHECK-NEXT: add w8, w0, #7 // =7
19 ; CHECK-NEXT: csel w8, w8, w0, lt
20 ; CHECK-NEXT: asr w0, w8, #3
29 ; CHECK-NEXT: add w8, w0, #7 // =7
31 ; CHECK-NEXT: csel w8, w8, w0, lt
32 ; CHECK-NEXT: neg w0, w8, asr #3
/external/libxaac/decoder/armv8/
Dixheaacd_fft32x32_ld2_armv8.s50 ADD w8, w3, w5 //xh0_1 = x_2 + x_6
66 ADD w2, w6, w8 //n00 = xh0_0 + xh0_1
68 SUB w4, w6, w8 //n20 = xh0_0 - xh0_1
95 ADD w8, w3, w5 //xh0_1 = x_2 + x_6
111 ADD w2, w6, w8 //n00 = xh0_0 + xh0_1
113 SUB w4, w6, w8 //n20 = xh0_0 - xh0_1
140 ADD w8, w3, w5 //xh0_1 = x_2 + x_6
156 ADD w2, w6, w8 //n00 = xh0_0 + xh0_1
158 SUB w4, w6, w8 //n20 = xh0_0 - xh0_1
185 ADD w8, w3, w5 //xh0_1 = x_2 + x_6
[all …]
Dixheaacd_postradixcompute4.s47 LDP w7, w8, [x1], #8 // x_2 :x_3
60 ADD w11, w8, w12 // xh1_1 = x_3 + x_7
61 SUB w8, w8, w12 // xl1_1 = x_3 - x_7
69 ADD w11, w5, w8 // n10 = xl0_0 + xl1_1
70 SUB w5, w5, w8 // n30 = xl0_0 - xl1_1
72 ADD w8, w6, w7 // n31 = xl1_0 + xl0_1
87 STR w8, [x0], #0 // y3[h2 + 1] = n31, x7 -> y0[h2+2]
92 LDP w7, w8, [x4], #8 // x_a :x_b
108 ADD w11, w8, w12
109 SUB w8, w8, w12
[all …]
/external/llvm/test/CodeGen/AArch64/
Dsdivpow2.ll6 ; CHECK: add w8, w0, #7
8 ; CHECK: csel w8, w8, w0, lt
9 ; CHECK: asr w0, w8, #3
16 ; CHECK: add w8, w0, #7
18 ; CHECK: csel w8, w8, w0, lt
19 ; CHECK: neg w0, w8, asr #3
26 ; CHECK: add w8, w0, #31
28 ; CHECK: csel w8, w8, w0, lt
29 ; CHECK: asr w0, w8, #5
Dfast-isel-folded-shift.ll7 ; CHECK: and [[REG:w[0-9]+]], w0, w8
16 ; CHECK: and [[REG:w[0-9]+]], w0, w8
25 ; CHECK: and w0, w0, w8
42 ; CHECK: orr [[REG:w[0-9]+]], w0, w8
51 ; CHECK: orr [[REG:w[0-9]+]], w0, w8
60 ; CHECK: orr w0, w0, w8
77 ; CHECK: eor [[REG:w[0-9]+]], w0, w8
86 ; CHECK: eor [[REG:w[0-9]+]], w0, w8
95 ; CHECK: eor w0, w0, w8
112 ; CHECK: add w0, w0, w8
Dfast-isel-branch-cond-split.ll43 ; CHECK-NEXT: cset w8, eq
46 ; CHECK-NEXT: orr w8, w8, w9
47 ; CHECK-NEXT: tbnz w8, #0,
65 ; CHECK-NEXT: cset w8, ne
68 ; CHECK-NEXT: and w8, w8, w9
69 ; CHECK-NEXT: tbz w8, #0,
/external/llvm/test/MC/AArch64/
Darm64-leaf-compact-unwind.s157 ldr w8, [x8]
174 sub w8, w8, w9
175 sub w8, w8, w7, lsl #1
176 sub w8, w8, w6, lsl #1
177 sub w8, w8, w5, lsl #1
178 sub w8, w8, w4, lsl #1
179 sub w8, w8, w3, lsl #1
180 sub w8, w8, w2, lsl #1
181 sub w0, w8, w1, lsl #1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-leaf-compact-unwind.s157 ldr w8, [x8]
174 sub w8, w8, w9
175 sub w8, w8, w7, lsl #1
176 sub w8, w8, w6, lsl #1
177 sub w8, w8, w5, lsl #1
178 sub w8, w8, w4, lsl #1
179 sub w8, w8, w3, lsl #1
180 sub w8, w8, w2, lsl #1
181 sub w0, w8, w1, lsl #1
/external/libhevc/common/arm64/
Dihevc_sao_edge_offset_class3.s89 LDR w8,[sp,#64] //Loads ht
253 csel w8,w20,w8,EQ
256 mov v1.b[0], w8 //au1_mask = vsetq_lane_s8(-1, au1_mask, 0)
260 LDRB w8,[x5,#1] //pu1_avail[1]
261 mov v1.b[15], w8 //au1_mask = vsetq_lane_s8(pu1_avail[1], au1_mask, 15)
264 LDRB w8,[x5,#2] //pu1_avail[2]
290 LDRB w8,[x7] //load the value and increment by src_strd
293 STRB w8,[x5,#1]! //store it in the stack pointer
308 LDRB w8,[x8]
311 mov v18.b[15], w8 //I vsetq_lane_u8
[all …]
/external/libavc/common/armv8/
Dih264_intra_pred_luma_16x16_av8.s449 ldrb w8, [x7], #-1
452 sub w12, w8, w9
453 ldrb w8, [x7], #-1
456 sub w8, w8, w9
458 add w12, w12, w8, lsl #1
460 ldrb w8, [x7], #-1
463 sub w8, w8, w9
465 add w8, w8, w8, lsl #1
467 add w12, w12, w8
473 ldrb w8, [x7], #-1
[all …]
Dih264_padding_neon_av8.s185 ldrb w8, [x0]
189 dup v0.16b, w8
200 ldrb w8, [x0]
205 dup v0.16b, w8
222 ldrb w8, [x0]
226 dup v0.16b, w8
240 ldrb w8, [x0]
243 dup v0.16b, w8
343 ldrh w8, [x0]
347 dup v0.8h, w8
[all …]

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