| /external/u-boot/board/renesas/r0p7734/ |
| D | lowlevel_init.S | 20 write32 WDTCSR_A, WDTCSR_D
23 write32 MMUCR_A, MMUCR_D
25 write32 FRQCR2_A, FRQCR2_D
26 write32 FRQCR0_A, FRQCR0_D
28 write32 CS0CTRL_A, CS0CTRL_D
29 write32 CS1CTRL_A, CS1CTRL_D
30 write32 CS0CTRL2_A, CS0CTRL2_D
32 write32 CSPWCR0_A, CSPWCR0_D
33 write32 CSPWCR1_A, CSPWCR1_D
34 write32 CS1GDST_A, CS1GDST_D
[all …]
|
| /external/u-boot/board/alphaproject/ap_sh4a_4a/ |
| D | lowlevel_init.S | 20 write32 WDTCSR_A, WDTCSR_D
23 write32 MMUCR_A, MMUCR_D
25 write32 FRQCR2_A, FRQCR2_D
26 write32 FRQCR0_A, FRQCR0_D
28 write32 CS0CTRL_A, CS0CTRL_D
29 write32 CS1CTRL_A, CS1CTRL_D
30 write32 CS0CTRL2_A, CS0CTRL2_D
32 write32 CSPWCR0_A, CSPWCR0_D
33 write32 CSPWCR1_A, CSPWCR1_D
34 write32 CS1GDST_A, CS1GDST_D
[all …]
|
| /external/u-boot/board/freescale/mx31pdk/ |
| D | lowlevel_init.S | 16 write32 IPU_CONF, IPU_CONF_DI_EN
17 write32 CCM_CCMR, CCM_CCMR_SETUP
21 write32 CCM_CCMR, CCM_CCMR_SETUP | CCMR_MPE
22 write32 CCM_CCMR, (CCM_CCMR_SETUP | CCMR_MPE) & ~CCMR_MDS
25 write32 CCM_PDR0, CCM_PDR0_SETUP_532MHZ
26 write32 CCM_MPCTL, CCM_MPCTL_SETUP_532MHZ
28 write32 CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
31 write32 IOMUXC_SW_PAD_CTL_SDCKE1_SDCLK_SDCLK_B, 0
32 write32 IOMUXC_SW_PAD_CTL_CAS_SDWE_SDCKE0, 0
33 write32 IOMUXC_SW_PAD_CTL_BCLK_RW_RAS, 0
[all …]
|
| /external/u-boot/board/renesas/sh7753evb/ |
| D | lowlevel_init.S | 60 write32 MRSTCR0_A, MRSTCR0_D
61 write32 MRSTCR1_A, MRSTCR1_D
82 write32 DBKIND_A, DBKIND_D
85 write32 DBCONF_A, DBCONF_D
86 write32 DBTR0_A, DBTR0_D
87 write32 DBTR1_A, DBTR1_D
88 write32 DBTR2_A, DBTR2_D
89 write32 DBTR3_A, DBTR3_D
90 write32 DBTR4_A, DBTR4_D
91 write32 DBTR5_A, DBTR5_D
[all …]
|
| /external/u-boot/board/renesas/sh7752evb/ |
| D | lowlevel_init.S | 94 write32 MRSTCR0_A, MRSTCR0_D
95 write32 MRSTCR1_A, MRSTCR1_D
116 write32 DBCMD_A, DBCMD_RSTL_VAL
120 write32 DBCMD_A, DBCMD_PDEN_VAL
123 write32 DBKIND_A, DBKIND_D
126 write32 DBCONF_A, DBCONF_D
127 write32 DBTR0_A, DBTR0_D
128 write32 DBTR1_A, DBTR1_D
129 write32 DBTR2_A, DBTR2_D
130 write32 DBTR3_A, DBTR3_D
[all …]
|
| /external/u-boot/board/renesas/sh7757lcr/ |
| D | lowlevel_init.S | 202 write32 DBCMD_A, DBCMD_RSTL_VAL
206 write32 DBCMD_A, DBCMD_PDEN_VAL
209 write32 DBKIND_A, DBKIND_D
212 write32 DBCONF_A, DBCONF_D
213 write32 DBTR0_A, DBTR0_D
214 write32 DBTR1_A, DBTR1_D
215 write32 DBTR2_A, DBTR2_D
216 write32 DBTR3_A, DBTR3_D
217 write32 DBTR4_A, DBTR4_D
218 write32 DBTR5_A, DBTR5_D
[all …]
|
| /external/u-boot/board/renesas/sh7785lcr/ |
| D | lowlevel_init.S | 21 write32 MMSELR_A, MMSELR_D
24 write32 DBSC2_DBCONF_A, DBSC2_DBCONF_D
25 write32 DBSC2_DBTR0_A, DBSC2_DBTR0_D
26 write32 DBSC2_DBTR1_A, DBSC2_DBTR1_D
27 write32 DBSC2_DBTR2_A, DBSC2_DBTR2_D
28 write32 DBSC2_DBFREQ_A, DBSC2_DBFREQ_D1
29 write32 DBSC2_DBFREQ_A, DBSC2_DBFREQ_D2
32 write32 DBSC2_DBDICODTOCD_A, DBSC2_DBDICODTOCD_D
33 write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_CKE_H
35 write32 DBSC2_DBCMDCNT_A, DBSC2_DBCMDCNT_D_PALL
[all …]
|
| /external/u-boot/board/renesas/sh7763rdp/ |
| D | lowlevel_init.S | 22 write32 WDTCSR_A, WDTCSR_D /* Watchdog Control / Status Register */
24 write32 WDTST_A, WDTST_D /* Watchdog Stop Time Register */
26 write32 WDTBST_A, WDTBST_D /*
31 write32 CCR_A, CCR_CACHE_ICI_D /* Address of Cache Control Register */
34 write32 MMUCR_A, MMU_CONTROL_TI_D /* MMU Control Register */
37 write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 0 */
39 write32 MSTPCR1_A, MSTPCR1_D /* Address of Power Control Register 1 */
41 write32 RAMCR_A, RAMCR_D
57 write32 MIM8_A, MIM8_D
59 write32 MIMC_A, MIMC_D1
[all …]
|
| /external/u-boot/board/renesas/ecovec/ |
| D | lowlevel_init.S | 36 write32 MMUCR_A, MMUCR_D
39 write32 PLLCR_A, PLLCR_D
40 write32 FRQCRA_A, FRQCRA_D
41 write32 FRQCRB_A, FRQCRB_D
45 write32 MMSELR_A, MMSELR_D
48 write32 CMNCR_A, CMNCR_D
49 write32 CS0BCR_A, CS0BCR_D
50 write32 CS0WCR_A, CS0WCR_D
55 write32 DBPDCNT0_A, DBPDCNT0_D0
56 write32 DBCONF_A, DBCONF_D
[all …]
|
| /external/u-boot/board/espt/ |
| D | lowlevel_init.S | 20 write32 WDTCSR_A, WDTCSR_D
22 write32 WDTST_A, WDTST_D
24 write32 WDTBST_A, WDTBST_D
26 write32 CCR_A, CCR_CACHE_ICI_D
28 write32 MMUCR_A, MMU_CONTROL_TI_D
30 write32 MSTPCR0_A, MSTPCR0_D
32 write32 MSTPCR1_A, MSTPCR1_D
34 write32 RAMCR_A, RAMCR_D
40 write32 MMSEL_A, MMSEL_D
47 write32 BCR_A, BCR_D
[all …]
|
| /external/u-boot/board/ms7720se/ |
| D | lowlevel_init.S | 24 write32 CMNCR_A, CMNCR_D
26 write32 CMNCR_A, CMNCR_D
28 write32 CS0BCR_A, CS0BCR_D
30 write32 CS2BCR_A, CS2BCR_D
32 write32 CS3BCR_A, CS3BCR_D
34 write32 CS4BCR_A, CS4BCR_D
36 write32 CS5ABCR_A, CS5ABCR_D
38 write32 CS5BBCR_A, CS5BBCR_D
40 write32 CS6ABCR_A, CS6ABCR_D
42 write32 CS6BBCR_A, CS6BBCR_D
[all …]
|
| /external/u-boot/board/renesas/MigoR/ |
| D | lowlevel_init.S | 31 write32 CCR_A, CCR_D ! Address of Cache Control Register
34 write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register
37 write32 MSTPCR0_A, MSTPCR0_D ! Address of Power Control Register 0
39 write32 MSTPCR2_A, MSTPCR2_D ! Address of Power Control Register 2
58 write32 DLLFRQ_A, DLLFRQ_D ! 20080115
61 write32 FRQCR_A, FRQCR_D ! 0xA4150000 Frequency control register
64 write32 CCR_A, CCR_D_2 ! Address of Cache Control Register
68 write32 CMNCR_A, CMNCR_D
70 write32 CS0BCR_A, CS0BCR_D
72 write32 CS4BCR_A, CS4BCR_D
[all …]
|
| /external/u-boot/board/renesas/ap325rxa/ |
| D | lowlevel_init.S | 37 write32 FRQCR_A, FRQCR_D
39 write32 CMNCR_A, CMNCR_D
41 write32 CS0BCR_A, CS0BCR_D
43 write32 CS4BCR_A, CS4BCR_D
45 write32 CS5ABCR_A, CS5ABCR_D
47 write32 CS5BBCR_A, CS5BBCR_D
49 write32 CS6ABCR_A, CS6ABCR_D
51 write32 CS6BBCR_A, CS6BBCR_D
53 write32 CS0WCR_A, CS0WCR_D
55 write32 CS4WCR_A, CS4WCR_D
[all …]
|
| /external/u-boot/board/ms7722se/ |
| D | lowlevel_init.S | 36 write32 CCR_A, CCR_D
42 write32 MMUCR_A, MMUCR_D
45 write32 MSTPCR0_A, MSTPCR0_D
48 write32 MSTPCR2_A, MSTPCR2_D
64 write32 FRQCR_A, FRQCR_D
66 write32 CCR_A, CCR_D_2
82 write32 CMNCR_A, CMNCR_D
84 write32 CS0BCR_A, CS0BCR_D
86 write32 CS2BCR_A, CS2BCR_D
88 write32 CS4BCR_A, CS4BCR_D
[all …]
|
| /external/u-boot/board/renesas/r7780mp/ |
| D | lowlevel_init.S | 27 write32 CCR_A, CCR_D /* Address of Cache Control Register */
30 write32 FRQCR_A, FRQCR_D /* Frequency control register */
33 write32 BBG_PMMR_A, BBG_PMMR_D_PMSR1
35 write32 BBG_PMSR1_A, BBG_PMSR1_D
37 write32 BBG_PMMR_A, BBG_PMMR_D_PMSR2
39 write32 BBG_PMSR2_A, BBG_PMSR2_D
41 write32 BBG_PMMR_A, BBG_PMMR_D_PMSR3
43 write32 BBG_PMSR3_A, BBG_PMSR3_D
45 write32 BBG_PMMR_A, BBG_PMMR_D_PMSR4
47 write32 BBG_PMSR4_A, BBG_PMSR4_D
[all …]
|
| /external/llvm/lib/MC/ |
| D | MachObjectWriter.cpp | 134 write32(is64Bit() ? MachO::MH_MAGIC_64 : MachO::MH_MAGIC); in writeHeader()
136 write32(TargetObjectWriter->getCPUType()); in writeHeader()
137 write32(TargetObjectWriter->getCPUSubtype()); in writeHeader()
139 write32(Type); in writeHeader()
140 write32(NumLoadCommands); in writeHeader()
141 write32(LoadCommandsSize); in writeHeader()
142 write32(Flags); in writeHeader()
144 write32(0); // reserved in writeHeader()
168 write32(is64Bit() ? MachO::LC_SEGMENT_64 : MachO::LC_SEGMENT); in writeSegmentLoadCommand()
169 write32(SegmentLoadCommandSize + in writeSegmentLoadCommand()
[all …]
|
| /external/u-boot/board/renesas/r2dplus/ |
| D | lowlevel_init.S | 18 write32 CCR_A, CCR_D_D
20 write32 MMUCR_A, MMUCR_D
22 write32 BCR1_A, BCR1_D
28 write32 BCR4_A, BCR4_D
30 write32 WCR1_A, WCR1_D
32 write32 WCR2_A, WCR2_D
34 write32 WCR3_A, WCR3_D
40 write32 MCR_A, MCR_D1
61 write32 MCR_A, MCR_D2
65 write32 IRLMASK_A, IRLMASK_D
[all …]
|
| /external/skqp/src/core/ |
| D | SkWriteBuffer.cpp | 39 fWriter.write32(SkToU32(size)); in writeByteArray()
52 fWriter.write32(count); in writeScalarArray()
57 fWriter.write32(value); in writeInt()
61 fWriter.write32(count); in writeIntArray()
66 fWriter.write32(value); in writeUInt()
74 fWriter.write32(color); in writeColor()
78 fWriter.write32(count); in writeColorArray()
87 fWriter.write32(count); in writeColor4fArray()
101 fWriter.write32(count); in writePointArray()
126 fWriter.write32(SkToU32(length)); in writeStream()
[all …]
|
| /external/skia/src/core/ |
| D | SkWriteBuffer.cpp | 39 fWriter.write32(SkToU32(size)); in writeByteArray()
52 fWriter.write32(count); in writeScalarArray()
57 fWriter.write32(value); in writeInt()
61 fWriter.write32(count); in writeIntArray()
66 fWriter.write32(value); in writeUInt()
74 fWriter.write32(color); in writeColor()
78 fWriter.write32(count); in writeColorArray()
87 fWriter.write32(count); in writeColor4fArray()
101 fWriter.write32(count); in writePointArray()
126 fWriter.write32(SkToU32(length)); in writeStream()
[all …]
|
| /external/u-boot/board/mpr2/ |
| D | lowlevel_init.S | 32 write32 CS0BCR_A, CS0BCR_D
34 write32 CS0WCR_A, CS0WCR_D
39 write32 CS3BCR_A, CS3BCR_D
41 write32 CS3WCR_A, CS3WCR_D
43 write32 SDCR_A, SDCR_D1
45 write32 RTCSR_A, RTCSR_D
47 write32 RTCNT_A, RTCNT_D
49 write32 RTCOR_A, RTCOR_D
51 write32 SDCR_A, SDCR_D2
|
| /external/u-boot/board/armadeus/apf27/ |
| D | lowlevel_init.S | 16 write32 AIPI1_PSR0, ACFG_AIPI1_PSR0_VAL
17 write32 AIPI1_PSR1, ACFG_AIPI1_PSR1_VAL
18 write32 AIPI2_PSR0, ACFG_AIPI2_PSR0_VAL
19 write32 AIPI2_PSR1, ACFG_AIPI2_PSR1_VAL
40 write32 MPCTL0, ACFG_MPCTL0_VAL
41 write32 SPCTL0, ACFG_SPCTL0_VAL
43 write32 CSCR, ACFG_CSCR_VAL|CSCR_MPLL_RESTART|CSCR_SPLL_RESTART
53 write32 PCDR0, ACFG_PCDR0_VAL
54 write32 PCDR1, ACFG_PCDR1_VAL
57 write32 PCCR0, ACFG_PCCR0_VAL
[all …]
|
| /external/u-boot/board/renesas/rsk7269/ |
| D | lowlevel_init.S | 22 write32 CCR1_A ,CCR1_D
53 write32 CS0WCR_A, CS0WCR_D
54 write32 CS0BCR_A, CS0BCR_D
60 write32 CS3BCR_A, CS3BCR_D
61 write32 CS3WCR_A, CS3WCR_D
62 write32 SDCR_A, SDCR_D
63 write32 RTCOR_A, RTCOR_D
64 write32 RTCSR_A, RTCSR_D
70 write32 CS1BCR_A, CS1BCR_D /* Big endian */
71 write32 CS1WCR_A, CS1WCR_D /* 1 cycle */
|
| /external/u-boot/board/renesas/rsk7203/ |
| D | lowlevel_init.S | 18 write32 CCR1_A ,CCR1_D
59 write32 CMNCR_A, CMNCR_D
61 write32 CS0BCR_A, CS0BCR_D
63 write32 CS0WCR_A, CS0WCR_D
68 write32 CS1WCR_A, CS1WCR_D
79 write32 CS3BCR_A, CS3BCR_D
81 write32 CS3WCR_A, CS3WCR_D
83 write32 SDCR_A, SDCR_D
85 write32 RTCOR_A, RTCOR_D
87 write32 RTCSR_A, RTCSR_D
|
| /external/u-boot/arch/nds32/cpu/n1213/ag101/ |
| D | lowlevel_init.S | 75 write32 CONFIG_DEBUG_LED, \num
144 write32 SDMC_TP1_A, SDMC_TP1_D ! 0x00011312
146 write32 SDMC_TP2_A, SDMC_TP2_D ! 0x00480180
148 write32 SDMC_CR1_A, SDMC_CR1_D ! 0x00002326
151 write32 SDMC_CR2_A, FTSDMC021_CR2_IPREC ! 0x00000010
155 write32 SDMC_CR2_A, FTSDMC021_CR2_ISMR ! 0x00000004
159 write32 SDMC_CR2_A, FTSDMC021_CR2_IREF ! 0x00000008
194 write32 SDMC_B0_BSR_A, SDMC_B0_BSR_D ! 0x00001800
195 write32 SDMC_B1_BSR_A, SDMC_B1_BSR_D ! 0x00001880
255 write32 SDMC_B0_BSR_A, 0x00001000
[all …]
|
| /external/u-boot/board/ms7750se/ |
| D | lowlevel_init.S | 51 write32 CCR_A, CCR_D_DISABLE
56 write32 BCR1_A, BCR1_D
60 write32 WCR1_A, WCR1_D
62 write32 WCR2_A, WCR2_D
64 write32 WCR3_A, WCR3_D
66 write32 MCR_A, MCR_D1
90 write32 MCR_A, MCR_D2
|