/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 245 FGETSIGN, enumerator
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 258 FGETSIGN, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 292 FGETSIGN, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | movmsk.ll | 98 ; FIXME: This should also use movmskps; we don't form the FGETSIGN node
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/external/llvm/test/CodeGen/X86/ |
D | movmsk.ll | 98 ; FIXME: This should also use movmskps; we don't form the FGETSIGN node
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 204 case ISD::FGETSIGN: return "fgetsign"; in getOperationName()
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D | TargetLowering.cpp | 1114 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType()); in SimplifyDemandedBits() 1115 bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); in SimplifyDemandedBits() 1122 SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 2329 case ISD::FGETSIGN: in computeKnownBits()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 243 case ISD::FGETSIGN: return "fgetsign"; in getOperationName()
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D | TargetLowering.cpp | 1187 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT); in SimplifyDemandedBits() 1188 bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); in SimplifyDemandedBits() 1196 SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 2723 case ISD::FGETSIGN: in computeKnownBits()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 565 setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand); in TargetLowering() 1789 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType()); in SimplifyDemandedBits() 1790 bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32); in SimplifyDemandedBits() 1795 SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0)); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 1952 case ISD::FGETSIGN: in ComputeMaskedBits() 6000 case ISD::FGETSIGN: return "fgetsign"; in getOperationName()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 598 setOperationAction(ISD::FGETSIGN, VT, Expand); in initActions()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 866 setOperationAction(ISD::FGETSIGN, VT, Expand); in initActions()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSelectionDAG.td | 371 def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 439 def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 421 def fgetsign : SDNode<"ISD::FGETSIGN" , SDTFPToIntOp>;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 567 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom); in X86TargetLowering() 568 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom); in X86TargetLowering() 10417 case ISD::FGETSIGN: return LowerFGETSIGN(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 681 setOperationAction(ISD::FGETSIGN, MVT::v4f64, Expand); in PPCTargetLowering() 734 setOperationAction(ISD::FGETSIGN, MVT::v4f32, Expand); in PPCTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 884 setOperationAction(ISD::FGETSIGN, MVT::v4f64, Expand); in PPCTargetLowering() 936 setOperationAction(ISD::FGETSIGN, MVT::v4f32, Expand); in PPCTargetLowering()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 507 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom); in X86TargetLowering() 508 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom); in X86TargetLowering() 21706 case ISD::FGETSIGN: return LowerFGETSIGN(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 543 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom); in X86TargetLowering() 544 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom); in X86TargetLowering() 25328 case ISD::FGETSIGN: return LowerFGETSIGN(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 660 setOperationAction(ISD::FGETSIGN, MVT::f64, Expand); in ARMTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 742 setOperationAction(ISD::FGETSIGN, MVT::f64, Expand); in ARMTargetLowering()
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