Searched refs:RegEnd (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | LiveIntervalUnion.cpp | 36 LiveRange::const_iterator RegEnd = Range.end(); in unify() local
41 if (++RegPos == RegEnd) in unify()
49 --RegEnd; in unify()
50 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg); in unify()
51 for (; RegPos != RegEnd; ++RegPos, ++SegPos) in unify()
63 LiveRange::const_iterator RegEnd = Range.end(); in extract() local
74 if (RegPos == RegEnd) in extract()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | LiveIntervalUnion.cpp | 35 LiveInterval::iterator RegEnd = VirtReg.end(); in unify() local
40 if (++RegPos == RegEnd) in unify()
48 --RegEnd; in unify()
49 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg); in unify()
50 for (; RegPos != RegEnd; ++RegPos, ++SegPos) in unify()
62 LiveInterval::iterator RegEnd = VirtReg.end(); in extract() local
73 if (RegPos == RegEnd) in extract()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LiveIntervalUnion.cpp | 37 LiveRange::const_iterator RegEnd = Range.end(); in unify() local
42 if (++RegPos == RegEnd) in unify()
50 --RegEnd; in unify()
51 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg); in unify()
52 for (; RegPos != RegEnd; ++RegPos, ++SegPos) in unify()
64 LiveRange::const_iterator RegEnd = Range.end(); in extract() local
75 if (RegPos == RegEnd) in extract()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 471 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) { in addInRegsParamInfo() argument
472 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd)); in addInRegsParamInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 482 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) { in addInRegsParamInfo() argument
483 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd)); in addInRegsParamInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 1201 unsigned RegEnd; in getIndirectIndexBegin() local
1202 for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; in getIndirectIndexBegin()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.cpp | 1222 unsigned RegEnd; in getIndirectIndexBegin() local
1223 for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; in getIndirectIndexBegin()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1715 unsigned RegBegin, RegEnd; in LowerCall() local
1716 CCInfo.getInRegsParamInfo(CurByValIdx, RegBegin, RegEnd); in LowerCall()
1721 for (i = 0, j = RegBegin; j < RegEnd; i++, j++) { in LowerCall()
1734 offset = RegEnd - RegBegin; in LowerCall()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1910 unsigned RegBegin, RegEnd; in LowerCall() local
1911 CCInfo.getInRegsParamInfo(CurByValIdx, RegBegin, RegEnd); in LowerCall()
1916 for (i = 0, j = RegBegin; j < RegEnd; i++, j++) { in LowerCall()
1928 offset = RegEnd - RegBegin; in LowerCall()
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