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Searched refs:andps (Results 1 – 25 of 163) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dcombine-fcopysign.ll13 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
28 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
43 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
108 ; SSE-NEXT: andps {{.*}}(%rip), %xmm1
109 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
130 ; SSE-NEXT: andps {{.*}}(%rip), %xmm1
131 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
152 ; SSE-NEXT: andps {{.*}}(%rip), %xmm1
153 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
174 ; SSE-NEXT: andps {{.*}}(%rip), %xmm2
[all …]
Dpr32368.ll10 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
12 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
53 ; SSE-NEXT: andps %xmm2, %xmm0
54 ; SSE-NEXT: andps %xmm2, %xmm1
58 ; SSE-NEXT: andps %xmm2, %xmm0
59 ; SSE-NEXT: andps %xmm2, %xmm1
100 ; SSE-NEXT: andps %xmm4, %xmm0
101 ; SSE-NEXT: andps %xmm4, %xmm1
102 ; SSE-NEXT: andps %xmm4, %xmm2
103 ; SSE-NEXT: andps %xmm4, %xmm3
[all …]
Dvec-copysign.ll22 ; SSE2-NEXT: andps [[SIGNMASK1]](%rip), %xmm1
23 ; SSE2-NEXT: andps [[MAGMASK1]](%rip), %xmm0
74 ; SSE2-NEXT: andps %xmm4, %xmm2
76 ; SSE2-NEXT: andps %xmm5, %xmm0
78 ; SSE2-NEXT: andps %xmm4, %xmm3
79 ; SSE2-NEXT: andps %xmm5, %xmm1
105 ; SSE2-NEXT: andps [[SIGNMASK3]](%rip), %xmm1
106 ; SSE2-NEXT: andps [[MAGMASK3]](%rip), %xmm0
145 ; SSE2-NEXT: andps %xmm4, %xmm2
147 ; SSE2-NEXT: andps %xmm5, %xmm0
[all …]
Dcopysign-constant-magnitude.ll15 ; CHECK-NEXT: andps [[SIGNMASK1]](%rip), %xmm0
30 ; CHECK-NEXT: andps %xmm1, %xmm0
46 ; CHECK-NEXT: andps [[SIGNMASK3]](%rip), %xmm0
66 ; CHECK-NEXT: andps [[SIGNMASK4]](%rip), %xmm0
81 ; CHECK-NEXT: andps [[SIGNMASK5]](%rip), %xmm0
96 ; CHECK-NEXT: andps %xmm1, %xmm0
112 ; CHECK-NEXT: andps [[SIGNMASK7]](%rip), %xmm0
134 ; CHECK-NEXT: andps [[SIGNMASK8]](%rip), %xmm0
Dmachine-cp.ll136 ; CHECK-NEXT: andps %xmm15, %xmm0
138 ; CHECK-NEXT: andps %xmm6, %xmm0
140 ; CHECK-NEXT: andps %xmm6, %xmm1
142 ; CHECK-NEXT: andps %xmm13, %xmm2
144 ; CHECK-NEXT: andps %xmm1, %xmm2
145 ; CHECK-NEXT: andps %xmm6, %xmm5
147 ; CHECK-NEXT: andps %xmm11, %xmm3
150 ; CHECK-NEXT: andps %xmm1, %xmm3
151 ; CHECK-NEXT: andps %xmm6, %xmm14
153 ; CHECK-NEXT: andps %xmm6, %xmm10
[all …]
Dsse-fcopysign.ll69 ; X32-NEXT: andps {{\.LCPI.*}}, %xmm1
70 ; X32-NEXT: andps {{\.LCPI.*}}, %xmm0
79 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
80 ; X64-NEXT: andps {{.*}}(%rip), %xmm1
97 ; X32-NEXT: andps {{\.LCPI.*}}, %xmm0
99 ; X32-NEXT: andps {{\.LCPI.*}}, %xmm1
111 ; X64-NEXT: andps {{.*}}(%rip), %xmm1
112 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
Dvec_reassociate.ll76 ; X86-NEXT: andps %xmm1, %xmm0
77 ; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
82 ; X64-NEXT: andps %xmm1, %xmm0
83 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
94 ; X86-NEXT: andps %xmm1, %xmm0
95 ; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
100 ; X64-NEXT: andps %xmm1, %xmm0
101 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
Dcombine-fabs.ll42 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
58 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
75 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
91 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
108 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
124 ; SSE-NEXT: andps {{.*}}(%rip), %xmm0
Dfp-logic.ll103 ; CHECK-NEXT: andps %xmm1, %xmm0
117 ; CHECK-NEXT: andps %xmm1, %xmm0
144 ; CHECK-NEXT: andps %xmm1, %xmm0
206 ; CHECK-NEXT: andps %xmm1, %xmm0
219 ; CHECK-NEXT: andps %xmm1, %xmm0
235 ; CHECK-NEXT: andps %xmm1, %xmm0
246 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
268 ; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
Dunfold-masked-merge-vector-variablemask-const.ll16 ; CHECK-SSE1-NEXT: andps (%rsi), %xmm0
166 ; CHECK-SSE1-NEXT: andps %xmm0, %xmm1
177 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm1
203 ; CHECK-SSE1-NEXT: andps %xmm0, %xmm1
214 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm1
241 ; CHECK-SSE1-NEXT: andps {{.*}}(%rip), %xmm0
252 ; CHECK-SSE2-NEXT: andps {{.*}}(%rip), %xmm0
279 ; CHECK-SSE1-NEXT: andps {{.*}}(%rip), %xmm0
290 ; CHECK-SSE2-NEXT: andps {{.*}}(%rip), %xmm0
386 ; CHECK-SSE1-NEXT: andps (%rdx), %xmm0
[all …]
Dfold-pcmpeqd-2.ll59 %andps.i5 = and <4 x i32> %bitcast.i3, zeroinitializer ; <<4 x i32>> [#uses=1]
66 %andps.i14 = add <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %bitcast6.i13 ; <<4 x i32>> [#uses=1]
69 %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1]
75 %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
79 %andps.i = and <4 x i32> zeroinitializer, %bitcast6.i ; <<4 x i32>> [#uses=1]
83 %orps.i = or <4 x i32> %andnps.i, %andps.i ; <<4 x i32>> [#uses=1]
Durem-power-of-two.ll109 ; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
114 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
123 ; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
128 ; X64-NEXT: andps {{.*}}(%rip), %xmm0
Dfast-isel-select-sse.ll15 ; SSE-NEXT: andps %xmm0, %xmm2
67 ; SSE-NEXT: andps %xmm1, %xmm2
121 ; SSE-NEXT: andps %xmm1, %xmm2
175 ; SSE-NEXT: andps %xmm0, %xmm2
227 ; SSE-NEXT: andps %xmm0, %xmm2
279 ; SSE-NEXT: andps %xmm0, %xmm2
331 ; SSE-NEXT: andps %xmm0, %xmm2
383 ; SSE-NEXT: andps %xmm0, %xmm2
435 ; SSE-NEXT: andps %xmm0, %xmm2
487 ; SSE-NEXT: andps %xmm1, %xmm2
[all …]
Dfp-select-cmp-and.ll100 ; CHECK-NEXT: andps %xmm1, %xmm0
111 ; CHECK-NEXT: andps %xmm1, %xmm0
122 ; CHECK-NEXT: andps %xmm1, %xmm2
134 ; CHECK-NEXT: andps %xmm1, %xmm2
192 ; CHECK-NEXT: andps %xmm3, %xmm2
/external/mesa3d/src/mesa/x86/
Dread_rgba_span_x86.S382 andps %xmm1, %xmm0
384 andps %xmm2, %xmm3
387 andps %xmm2, %xmm4
411 andps %xmm1, %xmm0
413 andps %xmm2, %xmm3
416 andps %xmm2, %xmm4
441 andps %xmm1, %xmm0
443 andps %xmm2, %xmm3
446 andps %xmm2, %xmm4
/external/llvm/test/CodeGen/X86/
Dfast-isel-select-sse.ll11 ; CHECK-NEXT: andps %xmm0, %xmm2
39 ; CHECK-NEXT: andps %xmm1, %xmm2
67 ; CHECK-NEXT: andps %xmm1, %xmm2
95 ; CHECK-NEXT: andps %xmm0, %xmm2
123 ; CHECK-NEXT: andps %xmm0, %xmm2
151 ; CHECK-NEXT: andps %xmm0, %xmm2
179 ; CHECK-NEXT: andps %xmm0, %xmm2
207 ; CHECK-NEXT: andps %xmm0, %xmm2
235 ; CHECK-NEXT: andps %xmm0, %xmm2
263 ; CHECK-NEXT: andps %xmm1, %xmm2
[all …]
Dcopysign-constant-magnitude.ll69 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
75 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
82 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
89 ; CHECK-NEXT: andps [[SIGNMASK]](%rip), %xmm0
Dfp-select-cmp-and.ll90 ; CHECK-NEXT: andps %xmm1, %xmm0
100 ; CHECK-NEXT: andps %xmm1, %xmm0
110 ; CHECK-NEXT: andps %xmm1, %xmm2
120 ; CHECK-NEXT: andps %xmm1, %xmm2
170 ; CHECK-NEXT: andps %xmm3, %xmm2
Dfold-pcmpeqd-2.ll59 %andps.i5 = and <4 x i32> %bitcast.i3, zeroinitializer ; <<4 x i32>> [#uses=1]
66 %andps.i14 = add <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %bitcast6.i13 ; <<4 x i32>> [#uses=1]
69 %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1]
75 %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
79 %andps.i = and <4 x i32> zeroinitializer, %bitcast6.i ; <<4 x i32>> [#uses=1]
83 %orps.i = or <4 x i32> %andnps.i, %andps.i ; <<4 x i32>> [#uses=1]
Dvec_reassociate.ll52 ;CHECK-NEXT: andps %xmm1, %xmm0
53 ;CHECK-NEXT: andps .LCPI4_0(%rip), %xmm0
64 ;CHECK-NEXT: andps %xmm1, %xmm0
65 ;CHECK-NEXT: andps .LCPI5_0(%rip), %xmm0
Dselect-with-and-or.ll10 ; CHECK-NEXT: andps
30 ; CHECK-NEXT: andps
70 ; CHECK-NEXT: andps
Dsse-fcopysign.ll59 ; X32-NEXT: andps .LCPI2_0, %xmm0
61 ; X32-NEXT: andps .LCPI2_1, %xmm1
69 ; X64: andps .LCPI2_0(%rip), %xmm0
70 ; X64-NEXT: andps .LCPI2_1(%rip), %xmm1
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
Dintel-syntax-ambiguous.s53 andps xmm1, xmmword ptr xmm1 label
56 andps xmmword ptr xmm1, xmm1 label
/external/llvm/test/MC/X86/
Dintel-syntax-ambiguous.s53 andps xmm1, xmmword ptr xmm1 label
56 andps xmmword ptr xmm1, xmm1 label
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dfold-pcmpeqd-2.ll59 %andps.i14 = and <4 x i32> zeroinitializer, %bitcast6.i13 ; <<4 x i32>> [#uses=1]
62 %orps.i18 = or <4 x i32> %andnps.i17, %andps.i14 ; <<4 x i32>> [#uses=1]
66 %andps.i5 = and <4 x i32> %bitcast.i3, zeroinitializer ; <<4 x i32>> [#uses=1]
71 %orps.i9 = or <4 x i32> %andnps.i8, %andps.i5 ; <<4 x i32>> [#uses=1]
75 %andps.i = and <4 x i32> zeroinitializer, %bitcast6.i ; <<4 x i32>> [#uses=1]
79 %orps.i = or <4 x i32> %andnps.i, %andps.i ; <<4 x i32>> [#uses=1]

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