| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 923 unsigned RotAmt = V.getConstantOperandVal(1); in getValueBits()
936 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
952 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
968 uint64_t Mask = V.getConstantOperandVal(1); in getValueBits()
3056 int Elt = N->getConstantOperandVal(0); in Select()
3057 int EltSize = N->getConstantOperandVal(1); in Select()
3165 uint64_t PM = O.getConstantOperandVal(2); in combineToCMPB()
3166 uint64_t PAlt = O.getConstantOperandVal(3); in combineToCMPB()
3179 O.getConstantOperandVal(1) != 0) { in combineToCMPB()
3193 if (Op0.getConstantOperandVal(1) != Bits-8) in combineToCMPB()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 1733 Val.getConstantOperandVal(1) > MaxAmount) in findSHL()
1760 Val.getConstantOperandVal(1) > 127) in findMULbyConst()
1779 uint64_t MulFactor = 1ull << N->getConstantOperandVal(1); in getMultiplierForSHL()
1801 return (unsigned) Val.getConstantOperandVal(1); in getPowerOf2Factor()
1813 V.getConstantOperandVal(i) % (1ULL << Amount) == 0) { in willShiftRightEliminate()
1814 uint64_t NewConst = V.getConstantOperandVal(i) >> Amount; in willShiftRightEliminate()
1818 return (Amount == V.getConstantOperandVal(1)); in willShiftRightEliminate()
1829 V.getConstantOperandVal(i) % ((uint64_t)1 << Power) == 0) { in factorOutPowerOf2()
1830 uint64_t NewConst = V.getConstantOperandVal(i) >> Power; in factorOutPowerOf2()
1839 uint64_t ShiftAmount = V.getConstantOperandVal(1); in factorOutPowerOf2()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1197 unsigned RotAmt = V.getConstantOperandVal(1); in getValueBits()
1209 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
1224 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
1239 uint64_t Mask = V.getConstantOperandVal(1); in getValueBits()
2456 assert(LoweredLogical.getConstantOperandVal(1) == 1 && in tryLogicOpOfCompares()
4854 int Elt = N->getConstantOperandVal(0); in Select()
4855 int EltSize = N->getConstantOperandVal(1); in Select()
5010 uint64_t PM = O.getConstantOperandVal(2); in combineToCMPB()
5011 uint64_t PAlt = O.getConstantOperandVal(3); in combineToCMPB()
5024 O.getConstantOperandVal(1) != 0) { in combineToCMPB()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelDAGToDAG.cpp | 177 N->getConstantOperandVal(OffsetOpIdx) != 0) in doPeepholeLoadStoreADDI()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 387 uint64_t Index = N->getConstantOperandVal(1); in getExtractVEXTRACTImmediate()
395 uint64_t Index = N->getConstantOperandVal(2); in getInsertVINSERTImmediate()
793 if (N->getConstantOperandVal(1)) in PreprocessISelDAG()
850 unsigned SubRegIdx = N->getConstantOperandVal(2); in PostprocessISelDAG()
1145 int ScaleLog = 8 - Shift.getConstantOperandVal(1); in foldMaskAndShiftToExtract()
1194 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask()
1254 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale()
1445 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1); in matchAddressRecursively()
1596 uint64_t Mask = N.getConstantOperandVal(1); in matchAddressRecursively()
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| D | X86ISelLowering.cpp | 5774 int BitLen = N->getConstantOperandVal(1); in getTargetShuffleMask()
5775 int BitIdx = N->getConstantOperandVal(2); in getTargetShuffleMask()
5786 int BitLen = N->getConstantOperandVal(2); in getTargetShuffleMask()
5787 int BitIdx = N->getConstantOperandVal(3); in getTargetShuffleMask()
5877 N0.getConstantOperandVal(1) == 0) in getTargetShuffleMask()
6226 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); in getFauxShuffleMask()
6244 uint64_t InIdx = N.getConstantOperandVal(2); in getFauxShuffleMask()
6266 uint64_t ExIdx = InScl.getConstantOperandVal(1); in getFauxShuffleMask()
6306 uint64_t ShiftVal = N.getConstantOperandVal(1); in getFauxShuffleMask()
6636 EltMaskIdx = Elt.getConstantOperandVal(1); in LowerBuildVectorv4x32()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 186 inline uint64_t getConstantOperandVal(unsigned i) const;
896 inline uint64_t getConstantOperandVal(unsigned Num) const;
1121 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
1122 return Node->getConstantOperandVal(i);
1529 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 139 inline uint64_t getConstantOperandVal(unsigned i) const;
531 uint64_t getConstantOperandVal(unsigned Num) const;
781 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
782 return Node->getConstantOperandVal(i);
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 615 if (N->getConstantOperandVal(1)) in PreprocessISelDAG()
927 int ScaleLog = 8 - Shift.getConstantOperandVal(1); in foldMaskAndShiftToExtract()
976 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask()
1036 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale()
1226 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1); in matchAddressRecursively()
1377 uint64_t Mask = N.getConstantOperandVal(1); in matchAddressRecursively()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 166 inline uint64_t getConstantOperandVal(unsigned i) const;
663 uint64_t getConstantOperandVal(unsigned Num) const;
880 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
881 return Node->getConstantOperandVal(i);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 940 uint64_t Pos = Node->getConstantOperandVal(1); in trySelect()
941 uint64_t Size = Node->getConstantOperandVal(2); in trySelect()
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| D | MipsSEISelLowering.cpp | 1384 Op->getConstantOperandVal(ImmOp), IsSigned), in lowerMSASplatImm()
1575 if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits()) in lowerINTRINSIC_WO_CHAIN()
1578 Op->getConstantOperandVal(3) + 1); in lowerINTRINSIC_WO_CHAIN()
1590 if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits()) in lowerINTRINSIC_WO_CHAIN()
1593 Op->getConstantOperandVal(3) + 1); in lowerINTRINSIC_WO_CHAIN()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 250 const unsigned Align = N->getConstantOperandVal(3); in ExpandRes_VAARG()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 597 if (Op.getConstantOperandVal(0) > 0) in LowerFRAMEADDR()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 306 const unsigned Align = N->getConstantOperandVal(3); in ExpandRes_VAARG()
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| D | InstrEmitter.cpp | 763 CC = Node->getConstantOperandVal(PatchPointOpers::CCPos); in EmitMachineNode()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1089 uint64_t depth = Op.getConstantOperandVal(0); in LowerFRAMEADDR()
1120 uint64_t depth = Op.getConstantOperandVal(0); in LowerRETURNADDR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 299 const unsigned Align = N->getConstantOperandVal(3); in ExpandRes_VAARG()
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| D | InstrEmitter.cpp | 818 CC = Node->getConstantOperandVal(PatchPointOpers::CCPos); in EmitMachineNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 3954 (SetCC->getConstantOperandVal(1) == 1 && in LowerBRCOND()
6430 Sel = (LHS.getConstantOperandVal(2) & Sel) | (~Sel & 0x0c0c0c0c); in performAndCombine()
6574 uint32_t Sel = getConstantPermuteMask(N->getConstantOperandVal(1)); in performOrCombine()
6578 Sel |= LHS.getConstantOperandVal(2); in performOrCombine()
7683 LHS.getConstantOperandVal(1) != LHS.getConstantOperandVal(2) && in performSetCCCombine()
7690 uint64_t CT = LHS.getConstantOperandVal(1); in performSetCCCombine()
7691 uint64_t CF = LHS.getConstantOperandVal(2); in performSetCCCombine()
7938 if (D16Idx >= 0 && Node->getConstantOperandVal(D16Idx)) in adjustWritemask()
7944 unsigned OldDmask = Node->getConstantOperandVal(DmaskIdx); in adjustWritemask()
7970 Lane = SubIdx2Lane(I->getConstantOperandVal(1)); in adjustWritemask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 796 if (Op.getConstantOperandVal(0) > 0) in LowerFRAMEADDR()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1387 (SetCC->getConstantOperandVal(1) == 1 && in LowerBRCOND()
3109 unsigned OldDmask = Node->getConstantOperandVal(DmaskIdx); in adjustWritemask()
3125 Lane = SubIdx2Lane(I->getConstantOperandVal(1)); in adjustWritemask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 4317 isPowerOf2_64(LHS.getConstantOperandVal(1))) { in LowerBR_CC()
4319 uint64_t Mask = LHS.getConstantOperandVal(1); in LowerBR_CC()
4333 isPowerOf2_64(LHS.getConstantOperandVal(1))) { in LowerBR_CC()
4335 uint64_t Mask = LHS.getConstantOperandVal(1); in LowerBR_CC()
4979 unsigned Align = Op.getConstantOperandVal(3); in LowerVAARG()
7088 uint64_t Val = N->getConstantOperandVal(1); in LowerBUILD_VECTOR()
7909 uint64_t ShiftAmount = Base.getOperand(1).getConstantOperandVal(1); in shouldReduceLoadWidth()
8505 uint64_t TruncMask = N->getConstantOperandVal(1); in isDesirableToCommuteWithShift()
8995 ShiftAmount = N->getConstantOperandVal(1); in findEXTRHalf()
9929 int64_t Offset = St.getBasePtr()->getConstantOperandVal(1); in replaceZeroVectorStore()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 1413 return DAG.getConstant(Op->getConstantOperandVal(ImmOp), SDLoc(Op), in lowerMSASplatImm()
1592 Op->getConstantOperandVal(3)); in lowerINTRINSIC_WO_CHAIN()
1605 Op->getConstantOperandVal(3)); in lowerINTRINSIC_WO_CHAIN()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 4919 Offset = Ptr.getConstantOperandVal(1); in LowerAsSplatVectorLoad()
8403 X86::CondCode CCode = (X86::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
8856 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
8874 (X86::CondCode)Cond.getOperand(1).getConstantOperandVal(0); in LowerBRCOND()
8887 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
9057 unsigned Align = Op.getConstantOperandVal(3); in LowerVAARG()
12893 X86::CondCode CC = (X86::CondCode)N->getConstantOperandVal(2); in PerformCMOVCombine()
13257 enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0); in CMPEQCombine()
13258 enum X86::CondCode cc1 = (enum X86::CondCode)N1.getConstantOperandVal(0); in CMPEQCombine()
14065 unsigned X86CC = N->getConstantOperandVal(0); in PerformSETCCCombine()
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