| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 486 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedBits()
1289 TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in SimplifyDemandedVectorElts()
2018 DCI.isBeforeLegalize() && N0->hasOneUse()) { in SimplifySetCC()
2107 if (DCI.isBeforeLegalize() && in SimplifySetCC()
2466 !DCI.isBeforeLegalize()); in SimplifySetCC()
2499 !DCI.isBeforeLegalize()); in SimplifySetCC()
2530 !DCI.isBeforeLegalize()); in SimplifySetCC()
2726 !DCI.isBeforeLegalize()))); in SimplifySetCC()
2752 !DCI.isBeforeLegalize()))); in SimplifySetCC()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1426 DCI.isBeforeLegalize() && N0->hasOneUse()) { in SimplifySetCC()
1512 if (DCI.isBeforeLegalize() && in SimplifySetCC()
1831 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1865 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
1897 EVT ShiftTy = DCI.isBeforeLegalize() in SimplifySetCC()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1601 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1617 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1780 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1619 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1636 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
1800 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetLowering.h | 892 bool isBeforeLegalize() const { return BeforeLegalize; } in isBeforeLegalize() function
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1980 if (DCI.isBeforeLegalize() && N0->hasOneUse() && in SimplifySetCC()
2018 if (DCI.isBeforeLegalize() && in SimplifySetCC()
2308 EVT ShiftTy = DCI.isBeforeLegalize() ? in SimplifySetCC()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2519 if (DCI.isBeforeLegalize()) in performAndCombine()
2908 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
3022 if (DCI.isBeforeLegalize()) in PerformDAGCombine()
|
| D | AMDGPUISelLowering.cpp | 2195 if (!DCI.isBeforeLegalize()) in performLoadCombine()
2243 if (!DCI.isBeforeLegalize()) in performStoreCombine()
2709 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 394 if (DCI.isBeforeLegalize()) in PerformADDECombine()
406 if (DCI.isBeforeLegalize()) in PerformSUBECombine()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 2322 bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; } in isBeforeLegalize() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2735 if (!DCI.isBeforeLegalize()) in performLoadCombine()
2786 if (!DCI.isBeforeLegalize()) in performStoreCombine()
3876 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformDAGCombine()
|
| D | SIISelLowering.cpp | 6377 if (DCI.isBeforeLegalize()) in performAndCombine()
7210 if (Vec.hasOneUse() && DCI.isBeforeLegalize()) { in performExtractVectorEltCombine()
7236 if (!DCI.isBeforeLegalize()) in performExtractVectorEltCombine()
7758 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in performCvtF32UByteNCombine()
7851 if (DCI.isBeforeLegalize()) in PerformDAGCombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 2882 bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; } in isBeforeLegalize() function
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1478 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 531 if (DCI.isBeforeLegalize()) in performADDECombine()
786 if (DCI.isBeforeLegalize()) in performSUBECombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9886 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineBUILD_VECTORToVPADDL()
10380 if (DCI.isBeforeLegalize()) return SDValue(); in PerformADDECombine()
10414 if (DCI.isBeforeLegalize()) in PerformSHLSimplify()
10604 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine()
10683 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in CombineANDShift()
11735 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformVLDCombine()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 8748 if (!DCI.isBeforeLegalize()) in split16BStores()
8915 TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(), in performTBISimplification()
9205 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in performNEONPostLDSTCombine()
9814 assert(DCI.isBeforeLegalize() || in performSelectCombine()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6443 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()
6622 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine()
7150 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in CombineBaseUpdate()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 31202 if (!DCI.isBeforeLegalize() && DCI.isBeforeLegalizeOps() && in combineShuffle()
31652 if (DCI.isBeforeLegalize()) { in combineBitcast()
32440 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(CondVT)) in combineVSelectWithAllOnesOrZeros()
32586 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in combineVSelectToShrunkBlend()
33386 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in combineCMov()
33876 if (DCI.isBeforeLegalize() && VT.isVector()) in combineMul()
33885 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in combineMul()
35021 if (DCI.isBeforeLegalize() || !Subtarget.getTargetLowering()->isCtlzFast()) in combineOrCmpEqZeroToCtlzSrl()
37115 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in combineBEXTR()
38220 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in combineMOVMSK()
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8725 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()
9036 if (DCI.isBeforeLegalize()) return SDValue(); in PerformADDCCombine()
9145 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMULCombine()
10102 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformVLDCombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 10195 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in performTBISimplification()
10225 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in performNEONPostLDSTCombine()
10833 assert(DCI.isBeforeLegalize() || in performSelectCombine()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 26047 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in combineShuffle()
26073 if (!DCI.isBeforeLegalize() && DCI.isBeforeLegalizeOps() && in combineShuffle()
26851 !DCI.isBeforeLegalize() && in combineSelect()
26887 TargetLowering::TargetLoweringOpt TLO(DAG, DCI.isBeforeLegalize(), in combineSelect()
27327 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in combineCMov()
27599 if (DCI.isBeforeLegalize() && VT.isVector()) in combineMul()
27606 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in combineMul()
29936 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in combineBT()
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 12499 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in PerformShuffleCombine()
13007 if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) in PerformMulCombine()
14014 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in PerformBTCombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 12098 if (Subtarget.hasP9Altivec() && !DCI.isBeforeLegalize()) { in DAGCombineBuildVector()
12534 if (Subtarget.isPPC64() && !DCI.isBeforeLegalize() && in PerformDAGCombine()
|